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Transactional Synchronization Extensions

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Transactional Synchronization Extensions (TSX) is an extension to the x86 instruction set architecture for microprocessors from Intel documented by Intel in February 2012 with first support scheduled by Intel with the Haswell processor.[1][2] TSX adds hardware transactional memory support.

New features

  • Hardware Lock Elision (HLE), which adds the instruction prefixes XACQUIRE and XRELEASE. The prefixes are ignored by processors which do not support HLE.
  • Restricted Transactional Memory (RTM), which adds the instructions XBEGIN, XEND, and XABORT.
  • The XTEST instruction, which returns whether the processor is executing in a transactional region.

See also

References

  1. ^ "Transactional Synchronization in Haswell". Software.intel.com. Retrieved 2012-02-07.
  2. ^ "Transactional memory going mainstream with Intel Haswell". Ars Technica. 2012-02-08. Retrieved 2012-02-09.
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