Intel MPX

Intel MPX (Memory Protection Extensions) is a set of extensions to the x86 instruction set architecture. With compiler, runtime library and operating system support, Intel MPX brings increased security to software by checking pointer references whose normal compile-time intentions are maliciously exploited at runtime due to buffer overflows. Intel MPX will introduce new registers, and new instruction set extensions that operate on these registers.^[1]^[2]^[3]^[4]

Intel MPX will be introduced as part of the Skylake microarchitecture.^[5]

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Instruction	Description
`BNDMK`	Create LowerBound (LB) and UpperBound (UB) in the bounds register
`BNDCL`	Checks the address against the lower bound
`BNDCU`	Checks the address against the upper bound in ones' complement form
`BNDCN`	Checks the address against the upper bound
`BNDMOV`	Copy/load LB and UB bounds
`BNDMOV`	Store LB and UB bounds
`BNDLDX`	Load bounds using address translation
`BNDSTX`	Store bounds using address translation

References

^ "Intel ISA Extensions". Intel. Retrieved 2013-11-04.
^ "Introduction to Intel Memory Protection Extensions". Intel. 2013-07-16. Retrieved 2013-09-10.
^ "Discussion of Intel Memory Protection Extensions (MPX) and comparison with AddressSanitizer". Retrieved 2013-11-04.
^ "Intel Memory Protection Extensions (Intel MPX) support in the GCC compiler". gnu.org. Retrieved 2013-11-04.
^ "Intel Software Development Emulator". Intel. 2012-06-15. Retrieved 2013-11-04.

External links

Intel Architecture Instruction Set Extensions Programming Reference (PDF). Intel. 2013. Retrieved 2013-09-10. {{cite book}}: Unknown parameter |month= ignored (help)
"Introduction to Intel Memory Protection Extensions". Intel. 2013-07-16. Retrieved 2013-09-10.
"Discussion of Intel Memory Protection Extensions (MPX) and comparison with AddressSanitizer". Retrieved 2013-11-04.
"Intel ISA Extensions". Retrieved 2013-11-04.
"Intel Memory Protection Extensions (Intel MPX) support in the GCC compiler". Retrieved 2013-11-04.

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Overview

See also

References

External links