File:DTL NAND Gate.svg
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Date/Time | Thumbnail | Dimensions | User | Comment | |
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current | 19:26, 18 January 2009 | 280 × 280 (38 KB) | Inductiveload | {{Information |Description={{en|1=An implementation of an en:NAND gate using en:Diode transistor logic.}} |Source=Own work by uploader |Author=Inductiveload |Date=2009/01/18 |Permission={{PD-self}} |other_versions= }} < |
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