Hardware reset

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A hardware reset or hard reset of a computer system is a hardware operation that re-initializes the core hardware components of the system, thus ending all current software operations in the system. This is typically, but not always, followed by booting of the system into firmware that re-initializes the rest of the system, and restarts the operating system.

Hardware resets are an essential part of the power-on process, but may also be triggered without power cycling the system by direct user intervention via a physical reset button, watchdog timers, or by software intervention that, as its last action, activates the hardware reset line.

Holding down the power button is a common way to force shutdown a computer. On Macs, pressing Control-Command-Power quits macOS and restarts the computer.

Hardware reset in 80x86 IBM PC[edit]

The 8086 microprocessors provide RESET pin that is used to do the hardware reset. When a HIGH is applied to the pin, the CPU immediately stops, and sets the major registers to these values:

Register Value
CS (Code Segment) 0xFFFF
DS (Data Segment) 0x0000
ES (Extra Data Segment) 0x0000
SS (Stack Segment) 0x0000
IP (Instruction Pointer) 0x0000

The CPU uses the values of CS and IP registers to find the location of the next instruction to execute. Location of next instruction is calculated using this simple equation:

Location of next instruction = (CS<<4) + (IP)

This implies that after the hardware reset, the CPU will start execution at the physical address 0xFFFF0. In IBM PC compatible computers, This address maps to BIOS ROM. The memory word at 0xFFFF0 usually contains a JMP instruction that redirects the CPU to execute the initialization code of BIOS. This JMP instruction is absolutely the first instruction executed after the reset.[1]

Hardware reset in later x86 CPUs[edit]

Later x86 processors reset the CS and IP registers similarly, refer to Reset vector.

See also[edit]


  1. ^ The 80x86 IBM PC and Compatible Computers (Volumes I & II (4th Edition)), By Mohamed Ali Mazidi and Janice Gillispie Mazidi, Section 9.1, Page 241.