K-202
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| Type | minicomputer |
|---|---|
| Release date | 1970s |
| Units shipped | 30 |
K-202 was a 16-bit minicomputer, created by a team led by Polish scientist Jacek Karpiński between 1970–1973 in cooperation with British companies Data-Loop[1] and M.B. Metals. Approximately 30 units were claimed to be produced. All units shipped to M.B. Metals were returned for service. Due to friction resulting from competition with Elwro, a government-backed competitor, the production of K-202 was blocked and Karpiński thrown out of his company under the allegiations of sabotage and embezzlement.
The K-202 had two main rivals Data General SuperNOVA minicomputer (United States) and the CTL Modular One (United Kingdom).
Some time afterwards, the K-202 was reimplemented as pl, hundreds units of which were built.
New features
The K-202 was capable of running about one million operations per second; however, its instruction set was not well suited to the typical tasks, making practical performance somewhat lower. The communist world was decades behind the West in integrated circuit manufacture, the export of which was (and still is) strictly controlled. Despite this, apparently, remarkable performance and low price there was no commercial interest from anywhere in the world. K-202 claimed to be the first mini-computer which used the paging technique, providing 8 MB of virtual memory; however, what its constructors called paging was in fact a simple segmentation. Furthermore, the advertised upper limit of 8MB of memory was practically unreachable due to signal propagation delays, 144 KB being the largest available configuration. K-202 was based on small- and medium-scale integrated circuits.
- Multiprogramming
- Multiprocessing
- 16-bit word
- More than 90 instructions
- 7 universal registers
- 16 ways of determining argument
- Operating memory of up to 4 million words
- Direct addressing of up to 64k words
- Autonomic data exchange with operating memories at the speed of 16 Mbit/s [note: i.e. 1M words/s]
- Implementation method – TTL/MSI integrated circuits
- Memory cycle 0.7 μs
- Processing speed of 1 million operations/second
Bibliography
- K-202 factsheet in Polish
- Broszura informacyjna minicomputer K-202 (Polish)
- PDF in Polish and English:
- Reklamówka z MTP Poznań 1971 (Polish)
- Brochure K-202 w j. angielskim z MTP Poznań 1971 in (English)
- "Maszyna cyfrowa K-202 – organizacja logiczna" – course materials (Polish)
- "Język operacyjny maszyny – JOM 1" – course materials (Polish)
- "Opis podstawowego języka symbolicznego M.C. K-202 – ASSK" – course materials (Polish)
- "System programowania minikomputera K-202 w języku Lisp 1.5. Instruction for programists, Poznań Instytut Automatyki Politechniki Poznańskiej 1974 (Polish)
- "60 lat polskich komputerów. Historia romantyczna" [1]
- MERA-400, K-202 reimplementation