Jump to content

PICMG 2.4

From Wikipedia, the free encyclopedia

This is an old revision of this page, as edited by LindsayH (talk | contribs) at 10:13, 27 September 2010 (WikiCleaner 0.99 - Headlines start with one "=" (partial BOT) (Detection by Wikipedia:WCW)). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

PICMG 2.4 is a specification by PICMG that standardizes user IO pin mappings from ANSI/VITA standard IP sites to J3/P3, J4/P4, and J5/P5 on a CompactPCI backplane.[1]

Status

Adopted : 9/9/1998

Current Revision : 1.0

References

  1. ^ "IP on CompactPCI". PICMG.