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MCST develops Elbrus processor architecture and the eponymous family of universal VLIW microprocessors based on it with the participation of {{Interlanguage link|INEUM||INEUM|ru|Институт электронных управляющих машин}}. |
MCST develops Elbrus processor architecture and the eponymous family of universal VLIW microprocessors based on it with the participation of {{Interlanguage link|INEUM||INEUM|ru|Институт электронных управляющих машин}}. |
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The name "Elbrus" is an acronym for "ExpLicit Basic Resources Utilization Scheduling".<ref>{{Cite book |last=Bode |first=Arndt |url=https://books.google.co.uk/books?id=esJrCQAAQBAJ&pg=PA18&lpg=PA18&dq=ExpLicit+Basic+Resources+Utilization+Scheduling&source=bl&ots=IROdJaeOxj&sig=ACfU3U3AqlqGsP4zCQ1T1FV1ALo18vkwzg&hl=en&sa=X&ved=2ahUKEwigva_uio74AhUITMAKHYNFA1kQ6AF6BAgpEAM#v=onepage&q=ExpLicit%20Basic%20Resources%20Utilization%20Scheduling&f=false |title=Euro-Par 2000 Parallel Processing: 6th International Euro-Par Conference Munich, Germany, August 29 – September 1, 2000 Proceedings |last2=Ludwig |first2=Thomas |last3=Karl |first3=Wolfgang |last4=Wismüller |first4=Roland |date=2003-06-26 |publisher=Springer |isbn=978-3-540-44520-3 |language=en}}</ref> |
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The name "Elbrus" is an acronym for '''"ExpLicit Basic Resources Utilization Scheduling"'''. |
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==Products== |
==Products== |
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Revision as of 06:00, 2 June 2022
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| Company type | Joint-stock company |
|---|---|
| Industry | Microprocessors |
| Founded | 1992 |
| Founder | Boris Babayan |
| Headquarters | , Russia |
| Revenue | $25 million[1] (2017) |
| $1.34 million[1] (2017) | |
| $911,252[1] (2017) | |
| Total assets | $54 million[1] (2017) |
| Total equity | $6.15 million (2017) |
| Website | www |
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MCST (Russian: МЦСТ, acronym for Moscow Center of SPARC Technologies) is a Russian microprocessor company that was set up in 1992.[2] Different types of processors made by MCST were used in personal computers, servers and computing systems. MCST develops microprocessors based on two different instruction set architecture (ISA): Elbrus and SPARC. MCST is a direct descendant of the Lebedev Institute of Precision Mechanics and Computer Engineering.[3]
MCST is the base organization of the Department of Informatics and Computer Engineering of the Moscow Institute of Physics and Technology.[4]
MCST develops Elbrus processor architecture and the eponymous family of universal VLIW microprocessors based on it with the participation of INEUM. The name "Elbrus" is an acronym for "ExpLicit Basic Resources Utilization Scheduling".[5]
Products
- Elbrus 1 (1973) was the fourth generation Soviet computer, developed by Vsevolod Burtsev. Implements tag-based architecture and ALGOL as system language like the Burroughs large systems. A side development was an update of the 1965 BESM-6 as Elbrus-1K2.
- Elbrus 2 (1977) was a 10-processor computer, considered the first Soviet supercomputer, with superscalar RISC processors. Re-implementation of the Elbrus 1 architecture with faster ECL chips.
- Elbrus 3 (1986) was a 16-processor computer developed by Boris Babayan. Differing completely from the architecture of both Elbrus 1 and Elbrus 2, it employed a VLIW architecture.
- Elbrus-90micro (1998–2010) is a computer line based on SPARC instruction set architecture (ISA) microprocessors: MCST R80, R150, R500, R500S, MCST-4R (MCST-R1000) and MCST-R2000 working at 80, 150, 500, 1000 and 2000 MHz.
- Elbrus-3M1 (2005) is a two-processor computer based on the Elbrus 2000 microprocessor employing VLIW architecture working at 300 MHz. It is a further development of the Elbrus 3 (1986).
- Elbrus МВ3S1/C (2009) is a ccNUMA 4-processor computer based on Elbrus-S microprocessor working at 500 MHz.
- Elbrus-2S+ (2011) is a dual-core Elbrus 2000 based microprocessor working at 500 MHz, with capacity to calculate 16 GFlops.
- Elbrus-2SM (2014) is a dual-core Elbrus 2000 based microprocessor working at 300 MHz, with capacity to calculate 9.6 GFlops.
- Elbrus-4S (2014) is a quad-core Elbrus 2000 based microprocessor working at 800 MHz, with capacity to calculate 50 GFlops.
- Elbrus-8S (2014–2015) is an octa-core Elbrus 2000 based microprocessor working at 1300 MHz, with capacity to calculate 250 GFlops.
- Elbrus-8SV (2018) is an octa-core Elbrus 2000 based microprocessor working at 1500 MHz, with capacity to calculate 576 GFlops.
- Elbrus-16S (2021) is 16-core Elbrus 2000 based microprocessor working at 2000 MHz, with capacity to calculate 750 GFlops at double precision and 1.5 TFlops at single precision operations.
- Elbrus-2S3 (2021) is a dual-core Elbrus 2000 based microprocessor working at 2000 MHz.
See also
References
- ^ a b c d Error: Unable to display the reference properly. See the documentation for details.
- ^ "Russia's microelectronics industry gets steam". East-West Digital News. Retrieved 25 October 2017.
- ^ "О компании/20 лет МЦСТ". 20.mcst.ru. MCST. Retrieved 25 October 2017.
- ^ Department of Informatics and Computer Engineering
- ^ Bode, Arndt; Ludwig, Thomas; Karl, Wolfgang; Wismüller, Roland (2003-06-26). Euro-Par 2000 Parallel Processing: 6th International Euro-Par Conference Munich, Germany, August 29 – September 1, 2000 Proceedings. Springer. ISBN 978-3-540-44520-3.
External links
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