Charge amplifier

From Wikipedia, the free encyclopedia
Jump to: navigation, search

A charge amplifier is a current integrator which produces a voltage output proportional to the integrated value of the input current. The amplifier offsets the input charge using a feedback reference capacitor, and produces an output voltage inversely proportional to the value of the reference capacitor but proportional to the total input charge flowing during the specified time period; hence the circuit acts as a charge-to-voltage converter. The gain of the circuit depends on the value of the feedback capacitor.


Common applications include amplification of signals from such as piezoelectric sensors and photodiodes, in which the charge output from the transducer is converted into a voltage.

Charge amplifiers are also used extensively in instruments measuring ionizing radiation, such as the proportional counter or the scintillation counter, where the energy of each pulse of detected radiation due to a ionising event must be measured. Integrating the charge pulses from the detector gives a translation of input pulse energy to a peak voltage output, which can then be measured for each pulse. Normally this then goes to discrimination circuits or a multi channel analyser.

Charge amplifiers are also used in the readout circuitry of CCD imagers and flat-panel X-ray detector arrays. The objective is to measure the very small charge stored within an in-pixel capacitor.

Advantages of charge amplifiers include:

  • Enables quasi-static measurements in certain situations, such as constant pressures on a piezo lasting several minutes[1]
  • Piezo element transducer can be used in much hotter environments than those with internal electronics[1]
  • Gain is dependent only on the feedback capacitor, unlike voltage amplifiers, which are affected greatly by the input capacitance of the amplifier and the parallel capacitance of the cable[1][2]


Charge amplifiers are usually constructed using an operational amplifier or other high gain semiconductor circuit with a negative feedback capacitor. The input current is offset by a negative feedback current flowing in the capacitor, which is generated by an increase in output voltage of the amplifier. The output voltage is therefore dependent on the value of input current it has to offset and the inverse of the value of the feedback capacitor. The greater the capacitor value, the less output voltage has to be generated to produce a particular feedback current flow.

The input impedance of the circuit is almost zero because of the Miller effect. Hence all the stray capacitances (the cable capacitance, the amplifier input capacitance, etc.) are virtually grounded and they have no influence on the output signal.[3]

Ideal circuit[edit]

An "ideal circuit" for analysing charge amplifier operation is shown below:

Integrator circuit

The circuit operates by passing a current that charges or discharges the capacitor Cf during the time under consideration, which strives to retain the virtual ground condition at the input by off-setting the effect of the input current. Referring to the above diagram, if the op-amp is assumed to be ideal, nodes v1 and v2 are held equal, and so v2 is a virtual ground. The input voltage passes a current \frac{v_{in}}{R_1} through the resistor producing a compensating current flow through the series capacitor to maintain the virtual ground. This charges or discharges the capacitor over time. Because the resistor and capacitor are connected to a virtual ground, the input current does not vary with capacitor charge and a linear integration of output is achieved.

The circuit can be analyzed by applying Kirchhoff's current law at the node v2, keeping ideal op-amp behaviour in mind.

i_{\text{1}} = I_{\text{B}} + i_{\text{F}}

I_{\text{B}} = 0 in an ideal op-amp, so:

i_{\text{1}} = i_{\text{F}}

Furthermore, the capacitor has a voltage-current relationship governed by the equation:

I_{\text{C}} = C \frac{dV_{\text{c}}}{dt}

Substituting the appropriate variables:

\frac{v_{\text{in}} - v_{\text{2}}}{R_{\text{1}}} = C_{\text{F}}\frac{d(v_{\text{2}} - v_{\text{o}})}{dt}

v_2 = v_1 = 0 in an ideal op-amp, resulting in:

\frac{v_{\text{in}}}{R_{\text{1}}} = -C_{\text{F}}\frac{dv_{\text{o}}}{dt}

Integrating both sides with respect to time:

 \int_0^t\frac{v_{\text{in}}}{R_{\text{1}}} \ dt\ = - \int_0^t C_{\text{F}} \frac{dv_{\text{o}}}{dt} \, dt

If the initial value of vo is assumed to be 0 V, this results in a DC error of:[4]

v_{\text{o}} = -\frac{1}{R_{\text{1}}C_{\text{F}}}\int_0^t v_{\text{in}}\, dt

Practical circuit[edit]

The ideal circuit is not a practical integrator design for a number of reasons. Practical op-amps have a finite open-loop gain, an input offset voltage and input bias currents (I_B). This can cause several issues for the ideal design; most importantly, if v_{\text{in}} = 0, both the output offset voltage and the input bias current I_B can cause current to pass through the capacitor, causing the output voltage to drift over time until the op-amp saturates. Similarly, if v_{\text{in}} were a signal centered about zero volts (i.e. without a DC component), no drift would be expected in an ideal circuit, but may occur in a real circuit. To negate the effect of the input bias current, it is necessary to set:

R_{\text{on}}=R_1 || R_f || R_L. The error voltage then becomes:

V_\text{E} = \left( \frac{R_\text{f}}{R_1} + 1 \right) V_{IOS}

The input bias current thus causes the same voltage drops at both the positive and negative terminals. A practical circuit is shown below.

Practical integrator

Also, in a DC steady state, the capacitor acts as an open circuit. The DC gain of the ideal circuit is therefore infinite (or in practice, the open-loop gain of a non-ideal op-amp). To counter this, a large resistor R_F is inserted in parallel with the feedback capacitor, as shown in the figure above. This limits the DC gain of the circuit to a finite value, and hence changes the output drift into a finite, preferably small, DC error. Referring to the above daigram:

V_\text{E} = \left( \frac{R_\text{f}}{R_1} + 1 \right) \left( V_{IOS} + I_{BI} \left( R_\text{f} \parallel R_1 \right) \right)

where V_{IOS} is the input offset voltage and I_{BI} is the input bias current on the inverting terminal. R_f \parallel R_1 indicates two resistance values in parallel.


See also[edit]

Obtaining virtual zero impedance by applying Miller theorem

Charge Transfer Amplifier


  1. ^ a b c "Piezoelectric Measurement System Comparison: Charge Mode vs. Low Impedance Voltage Mode (LIVM)". Dytran Instruments. Retrieved 2007-10-26. 
  2. ^ "Maximum cable length for charge-mode piezoelectric accelerometers". Endevco. Jan. Retrieved 2007-10-26.  Check date values in: |date= (help)
  3. ^ Transducers with Charge Output
  4. ^ "AN1177 Op Amp Precision Design: DC Errors" (PDF). Microchip. 2 January 2008. Archived from the original on 2013-01-11. Retrieved 26 December 2012. 

External links[edit]