TENET 210

The TENET 210 was a mainframe computer designed for timesharing services. The machine was designed for high throughput and expandability, including 20 direct memory access (DMA) channels and eight slots for core memory, allowing up to 128k 32-bit words of RAM. The sales materials boasted that it guaranteed user responses within one second.

The 210 was the only product of TENET Inc, formed by several former members of Fairchild Semiconductor during its heyday in the late 1960s. The company sold one TENET 210 before going out of business, but of the four companies started at that time to serve the timesharing market, it was the only one to sell a product.

History

The TENET 210 ultimately traces its history to a project within Fairchild Semiconductor's research and development center in Palo Alto, California run by Gordon Moore. A department managed by Rex Rice was developing a machine specifically for the timesharing market. Known as the Symbol IIR, the design concept was a machine that ran a PL/1-like language as its native language, and would be implemented entirely in hardware - no microcode or firmware was allowed.^[1]

In 1966, Chuck Runge was working for the Atomic Energy Commission, writing compilers and operations systems at Iowa State University. Rice visited the campus on a recruiting drive and Runge interviewed with Moore that March. Runge joined the company in June, but quickly became disillusioned with the no-software decree, and was convinced the project would never ship. He found a like-minded engineer in Dave Masters, who knew Fairchild president Bob Noyce.^[1]

The two approached Noyce with the idea of developing a new computer. The system was initially pitched as a controller for Fairchild Instrumentation's new Sentry product, a software-controlled semiconductor testing system. This produced the 24-bit Fairchild FST-1, as well as the FACTOR programming language used to program the test suites. Although it was by most measures a general-purpose minicomputer, Fairchild was uninterested in marketing it as such.^[2]

At the time, the timesharing market was developing rapidly, and had split into two solution classes; the minicomputer end was aimed at smaller users who would buy a complete system for in-house use, like the HP 2100, while at the other end were large mainframes that sold services to users on remote computer terminals, charging them per-minute for connect time and file storage space. In the summer of 1968, Runge and Masters left Fairchild to form TENET Inc with the intent of building a mid-range system with the price of the mini offerings but the power of the mainframes and targeting it to in-house markets.^[1]

The early stages of forming TENET involved writing the business plan, preliminary design work on the machine architecture and the Operating System and recruiting key staff to join the venture. Concurrently Runge, to assist with his contribution to the company’s funding, took a contract with Fairchild to complete the specification of FACTOR and design its compiler.^[1]

When Tom Bay, formerly General Manager of Fairchild Semiconductor, joined the team as Chairman of the Board he arranged a meeting with Fred Adler, a NY trial attorney who had been instrumental in arranging venture capital funding for Data General's launch that year. Adler put together a $2 million package to fund the development of two prototypes, launching the company early in 1969. Development of the first machine was completed within two years. To introduce the TENET 210, in January 1971 they held an open house in which a concert pianist used the prototype as a music synthesizer. However, the company had the bad fortune of launching sales directly into the leading edge of the 1973–1975 recession, and further funding was not available.^[2]

Tymshare examined the machine as a replacement for the SDS 940s, and Hewlett-Packard as a replacement for their initial failed effort for what became the HP 3000, but neither ultimately purchased the design. The company's one and only sale was a bid in response to a State of California request for proposal for a machine to support their civil engineering teams designing roads and bridges. They won the bid although by this time the company was already in Chapter 11 protection, maintaining the machine through a separate contract that later included the purchase of the original prototype to use as a parts machine. This machine was only retired in the 1980s.^[2]

Design

The basic concept arranged the machine around a high-performance memory bus they referred to as the "data exchange". In the 200-series design, the only one to be built, there were two independent 32-bit busses. Each could perform a read and a write at the same time, as long as they were to different locations in memory. In total, the bus could provide 20 MB/sec bandwidth. Core memory was connected on one side of the bus, with up to eight modules of 8 to 16k words each. Fully expanded, a system could have 8 x 16 = 128 kWords, or 512 kB.^[3]

The 210 was a single-processor design, but in theory up to four 3210 CPUs could be connected to the bus. In the 210, the CPU had two connections to the bus, allowing it to perform a total of four memory operations per cycle.^[4] There were twenty ports in total to the bus, so in the 210 there were eighteen free ports on the data bus that could be used for devices. Expansion systems included a disk controller which could run one to four 25 MB hard drives, a communications card for up to 16 terminals each, card readers, printer outputs and tape drives.^[5]

A significant aspect of the design was its memory paging system, which used conventional hard drives rather than the custom memory drums or specialized hard disks with multiple read/write heads (a random-access disk, or RAD). Making this work with reasonable performance required significant efforts to tune the input/output routines to avoid unnecessary reads and writes, which was handled in the system's hardware memory management unit. Time-to-market and overall cost was also reduced through the use of off-the-shelf TTL small scale integration circuits.^[2]

The CPU was designed to minimize the program sizes as a further effort to reduce memory swapping. It included eight general-purpose registers and a separate set of eight control registers.^[4] Its instruction set included a variety of "rich" instructions for packing and unpacking bytes into words, gathering and scattering data in memory, test-and-set, pre- and post-indexing and pattern matching against memory. The Programmed Instructions, or PINS, were designed to improve the density of subroutine calls; a single 32-bit word called a routine and passed a single parameter. There were sixteen global PINS, hard-wired to key operating system routines. A further 48 PINS were available for user programs.^[6]

The system was primarily intended to be used by end-user programmers. It was supplied with two programming languages, FORTRAN IV and TENET BASIC, the later of which they claimed was the most powerful version of the BASIC programming language available.^[7] The language subsystems consisted of a seamlessly integrated editor, compiler, linker and a debugger syntactically compatible with the language. Machines also included a text editor, macro assembler, two debuggers and a single- and double-precision floating point library.^[8]

Prices listed in September 1970 put a basic unit, with a single CPU and 32 kWords of memory, at $220,000 (equivalent to $1,726,067 in 2023) while a fully-expanded version with 128 kWords was $475,000 (equivalent to $3,726,735 in 2023). Hard drive controllers were $21,000, the drives themselves $19,500, and the communications card and "quad adaptor" were $4,000 and $2,000 respectively Up to four quad adaptors could be used with each communications card, for a total of 16 terminals per card.^[9]

Origin of this Piece

This piece is a summary taken from a 2008 article published in the IEEE Annals - The Genesis of the TENET 210—an early time-sharing system . The IEEE Annals article was an abbreviated version of the original unabridged version which can be found at http://www.certes.com/Tenet/

References

Citations

^ ^a ^b ^c ^d Runge 2008, p. 78.
^ ^a ^b ^c ^d Runge 2008.
^ Brochure 1970, p. 2.
^ ^a ^b Brochure 1970, p. 3.
^ Brochure 1970, pp. 1, 5.
^ Brochure 1970, p. 4.
^ Brochure 1970, p. 6.
^ Brochure 1970, pp. 7, 9.
^ Brochure 1970, p. 9.

Bibliography

TENET 210 (PDF). Tenet. 18 May 1970.
Runge, Chuck (July–September 2008). "The Genesis of the Tenet 210: An Early Time-Sharing System". IEEE Annals of the History of Computing. 30 (3): 78–81. doi:10.1109/MAHC.2008.53. S2CID 35859061.