Property Specification Language: Difference between revisions

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Property Specification Language is a language developed by Accellera for specifying properties or assertions about hardware designs. Since September 2004 the standardization on the language has been done in IEEE 1850 working group. The properties can then be simulated or formally verified.

Propery Specification Language aims to be used with multiple electronic system design languages such as

VHDL (IEEE 1076),
Verilog (IEEE 1364),
System Verilog (IEEE 1800), and
SystemC by OSCI.

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-'''Property Specification Language''' is a language [[standard]]ized by [[Accellera]] for specifying [[Property (philosophy)|properties]] or [[assertion (computing)|assertions]] about [[hardware]] designs. The properties can then be [[simulation|simulated]] or [[Formal verification|formally verified]]. It comes in two flavors, one for [[VHDL]] and one for [[Verilog]].
+'''Property Specification Language''' is a language developed by [[Accellera]] for specifying [[Property (philosophy)|properties]] or [[assertion (computing)|assertions]] about [[hardware]] designs. Since [[September]] [[2004]] the [[standard]]ization on the language has been done in [[IEEE]] 1850 working group. The properties can then be [[simulation|simulated]] or [[Formal verification|formally verified]].
-More information is available at
+Propery Specification Language aims to be used with multiple electronic system design languages such as
+* [[VHDL]] (IEEE 1076),
+* [[Verilog]] (IEEE 1364),
+* [[System Verilog]] (IEEE 1800), and
+* [[SystemC]] by [[OSCI]].
+== See also ==
+* [http://www.eda.org/ieee-1850 IEEE 1850 working group]
 * [http://www.accellera.org/ Accellera]
 * [http://www.pslsugar.org/ The PSL/Sugar Consortium]
 * [http://www.doulos.com/knowhow/psl/ Designers guide to PSL]
 {{compu-lang-stub}}
 [[Category: Hardware description languages]]
 [[Category: Electronic Design Automation]]