Intel 8255: Difference between revisions
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This chip is used to give the CPU access to programmable parallel [[Input/output|I/O]], and is similar to other such chips like the [[Peripheral Interface Adapter|Motorola 6520 PIA]] (Peripheral Interface Adapter) the [[MOS Technology 6522]] (Versatile Interface Adapter) and the [[MOS Technology CIA]] (Complex Interface Adapter) all developed for the [[MOS Technology 6502|6502]] family. Other such chips are the 2655 Programmable Peripheral Interface from the [[Signetics 2650]] family of microprocessors, the 6820 PIO (Peripheral Input/Output) from the [[Motorola 6800]] family, the [[Western Design Center]] [[WDC 65C21]], an enhanced 6520, and many others. |
This chip is used to give the CPU access to programmable parallel [[Input/output|I/O]], and is similar to other such chips like the [[Peripheral Interface Adapter|Motorola 6520 PIA]] (Peripheral Interface Adapter) the [[MOS Technology 6522]] (Versatile Interface Adapter) and the [[MOS Technology CIA]] (Complex Interface Adapter) all developed for the [[MOS Technology 6502|6502]] family. Other such chips are the 2655 Programmable Peripheral Interface from the [[Signetics 2650]] family of microprocessors, the 6820 PIO (Peripheral Input/Output) from the [[Motorola 6800]] family, the [[Western Design Center]] [[WDC 65C21]], an enhanced 6520, and many others. |
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The 8255 is widely used not only in many microcomputer/microcontroller systems especially Z-80 based, [[home computer]]s such as [[SV-328]] and all [[MSX]], but also in the system board of the best known original [[IBM-PC]], PC/XT, PC/jr, etc. and clones. |
The 8255 is widely used not only in many microcomputer/microcontroller systems especially Z-80 based, [[home computer]]s such as [[SV-328]] and all [[MSX]], but also in the system board of the best known original [[IBM-PC]], PC/XT, PC/jr, etc. and clones, along with numerous [[homebuilt computer]] computers such as the [[N8VEM]]. |
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However, most often the functionality the 8255 offered is now not implemented with the 8255 chip itself anymore, but is embedded in a larger [[Very-large-scale integration|VLSI]] chip as a sub function. The 8255 chip itself is still made, and is sometimes used together with a [[micro controller]] to expand its I/O capabilities. |
However, most often the functionality the 8255 offered is now not implemented with the 8255 chip itself anymore, but is embedded in a larger [[Very-large-scale integration|VLSI]] chip as a sub function. The 8255 chip itself is still made, and is sometimes used together with a [[micro controller]] to expand its I/O capabilities. |
Revision as of 03:41, 25 January 2011
The Intel 8255 (or i8255) Programmable Peripheral Interface chip is a peripheral chip originally developed for the Intel 8085 microprocessor, and as such is a member of a large array of such chips, known as the MCS-85 Family. This chip was later also used with the Intel 8086 and its descendants. It was later made (cloned) by many other manufacturers. It is made in DIP 40 and PLCC 44 pins encapsulated versions.
This chip is used to give the CPU access to programmable parallel I/O, and is similar to other such chips like the Motorola 6520 PIA (Peripheral Interface Adapter) the MOS Technology 6522 (Versatile Interface Adapter) and the MOS Technology CIA (Complex Interface Adapter) all developed for the 6502 family. Other such chips are the 2655 Programmable Peripheral Interface from the Signetics 2650 family of microprocessors, the 6820 PIO (Peripheral Input/Output) from the Motorola 6800 family, the Western Design Center WDC 65C21, an enhanced 6520, and many others.
The 8255 is widely used not only in many microcomputer/microcontroller systems especially Z-80 based, home computers such as SV-328 and all MSX, but also in the system board of the best known original IBM-PC, PC/XT, PC/jr, etc. and clones, along with numerous homebuilt computer computers such as the N8VEM.
However, most often the functionality the 8255 offered is now not implemented with the 8255 chip itself anymore, but is embedded in a larger VLSI chip as a sub function. The 8255 chip itself is still made, and is sometimes used together with a micro controller to expand its I/O capabilities.
Functional block of 8255
The 8255 has 24 input/output pins in all. These are divided into three 8-bit ports. Port A and port B can be used as 8-bit input/output ports. Port C can be used as an 8-bit input/output port or as two 4-bit input/output ports or to produce handshake signals for ports A and B.
The three ports are further grouped as follows:
- Group A consisting of port A and upper part of port C.
- Group B consisting of port B and lower part of port C.
Eight data lines (D0 - D7) are available (with an 8-bit data buffer) to read/write data into the ports or control register under the status of the "RD" (pin 5) and WR" (pin 36), which are active low signals for read and write operations respectively. The address lines A1 and A0 allow to successively access any one of the ports or the control register as listed below:
A1 | A0 | Function |
---|---|---|
0 | 0 | port A |
0 | 1 | port B |
0 | 0 | port C |
0 | 0 | control register |
The control signal "'CS" (pin 6) is used to enable the 8255 chip. It is an active low signal, i.e., when CS = '0' , the 8255 is enabled. The RESET input (pin 35) is connected to a system (like 8085, 8086, etc. ) reset line so that when the system is reset, all the ports are initialised as input lines. This is done to prevent 8255 and/or any peripheral connected to it, from being destroyed due to mismatch of ports. This is explained as follows. Suppose an input device is connected to 8255 at port A. If from the previous operation, port A is initialised as an output port and if 8255 is not reset before using the current configuration, then there is a possibility of damage of either the input device connected or 8255 or both since both 8255 and the device connected will be sending out data.
The control register or the control logic or the command word register is an 8-bit register used to select the modes of operation and input/output designation of the ports.
Operational modes of 8255
There are two main operational modes of 8255:
- Input/output mode
- Bit set/reset mode
Input/output mode
There are three types of the input/output mode which are as follows:
- Mode 0
In this mode, the ports can be used for simple input/output operations without handshaking. If both port A and B are initialized in mode 0, the two halves of port C can be either used together as an additional 8-bit port, or they can be used as individual 4-bit ports. Since the two halves of port C are independent, they may be used such that one-half is initialized as an input port while the other half is initialized as an output port. The input/output features in mode 0 are as follows:
- O/p are latched.
- I/p are buffered not latched.
- Port do not have handshake or interrupt capability.
- Mode 1
When we wish to use port A or port B for handshake (strobed) input or output operation, we initialise that port in mode 1 (port A and port B can be initilalised to operate in different modes, i.e., for e.g., port A can operate in mode 0 and port B in mode 1). Some of the pins of port C function as handshake lines.
For port B in this mode (irrespective of whether is acting as an input port or output port), PC0, PC1 and PC2 pins function as handshake lines.
If port A is initialised as mode 1 input port, then, PC3, PC4 and PC5 function as handshake signals. Pins PC6 and PC7 are available for use as input/output lines.
The mode 1 which supports handshaking has following features:
- Two ports i.e. port A and B can be use as 8-bit i/o port.
- Each port uses three lines of port c as handshake signal and remaining two signals can be function as i/o port.
- Interrupt logic is supported.
- Input and Output data are latched.
- Mode 2
Only group A can be initialised in this mode. Port A can be used for bidirectional handshake data transfer. This means that data can be input or output on the same eight lines (PA0 - PA7). Pins PC3 - PC7 are used as handshake lines for port A. The remaining pins of port C (PC0 - PC2) can be used as input/output lines if group B is initialised in mode 0. In this mode, the 8255 may be used to extend the system bus to a slave microprocessor or to transfer data bytes to and from a floppy disk controller.
Bit set/reset (BSR) mode
In this mode only port B can be used (as an output port). Each line of port C (PC0 - PC7) can be set/reset by suitably loading the command word register.no effect occurs in input-output mode. The individual bits of port c can be set or reset by sending the signal OUT instruction to the control register.
Control word format
Input/output mode format
- The figure shows the control word format in the input/output mode. This mode is selected by making D7 = '1' .
- D0, D1, D3, D4 are for lower port C, port B, upper port C and port A respectively. When D0 or D1 or D3 or D4 are "SET", the corresponding ports act as input ports. For e.g., if D0 = D4 = '1', then lower port C and port A act as input ports. If these bits are "RESET", then the corresponding ports act as output ports. For e.g., if D1 = D3 = '0', then port B and upper port C act as output ports.
- D2 is used for mode selection for group B (Port B and Lower Port C). When D2 = '0', mode 0 is selected and when D2 = '1', mode 1 is selected.
- D5, D6 are used for mode selection for group A (Upper Port C and Port A). The format is as follows:
D6 | D5 | mode |
---|---|---|
0 | 0 | 0 |
0 | 1 | 1 |
1 | x | 2 |
Example: If port B and upper port C have to be initialised as input ports and lower port C and port A as ouput ports (all in mode 0), what is the control word?
- 1. Since it is an input/ouput mode, D7 = '1'.
- 2. Mode selection bits, D2, D5, D6 are all '0' for mode 0 operation.
- 3. Port B should operate as input port, hence, D1 = '1'.
- 4. Upper port C should also be an input port, hence, D3 = '1'.
- 5. Port A has to operate output port, hence, D4 = '0'.
- 6. Lower port C should also operate as output port, hence, D0 = '0'.
Applying the corresponding values to the format in input/output mode, we get the control word as "8A (hex)"
BSR mode format
- The figure shows the control word format in BSR mode. This mode is selected by making D7='0'.
- D0 is used for bit set/reset. When D0= '1', the port C bit selected (selection of a port C bit is shown in the next point) is SET, when D0 = '0', the port C bit is RESET.
- D1, D2, D3 are used to select a particular port C bit whose value may be altered using D0 bit as mentioned above. The selection of the port C bits are done as follows:
D3 | D2 | D1 | Bit/pin of port C selected |
---|---|---|---|
0 | 0 | 0 | PC0 |
0 | 0 | 1 | PC1 |
0 | 1 | 0 | PC2 |
0 | 1 | 1 | PC3 |
1 | 0 | 0 | PC4 |
1 | 0 | 1 | PC5 |
1 | 1 | 0 | PC6 |
1 | 1 | 1 | PC7 |
- D4, D5, D6 are not used.
Example: If the 5th bit (PC5) of port C has to be "SET", then what is the control word?
- 1. Since it is BSR mode, D7 = '0'.
- 2. Since D4, D5, D6 are not used, assume them to be '0'.
- 3. PC5 has to be selected, hence, D3 = '1', D2 = '0', D1 = '1'.
- 4. PC5 has to be set, hence, D0 = '1'.
Applying the above values to the format for BSR mode, we get the control word as "0B (hex)".