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Binary	Gray code	One-hot
000	000	00000001
001	001	00000010
010	011	00000100
011	010	00001000
100	110	00010000
101	111	00100000
110	101	01000000
111	100	10000000

In digital circuits, one-hot is a group of bits among which the legal combinations of values are only those with a single high (1) bit and all the others low (0).^[1] A similar implementation in which all bits are '1' except one '0' is sometimes called one-cold.

Applications

One-hot encoding is often used for indicating the state of a state machine. When using binary or Gray code, a decoder is needed to determine the state. A one-hot state machine, however, does not need a decoder as the state machine is in the nth state if and only if the nth bit is high.

A ring counter with 15 sequentially-ordered states is an example of a state machine. A 'one-hot' implementation would have 15 flip flops chained in series with the Q output of each flip flop connected to the D input of the next and the D input of the first flip flop connected to the Q output of the 15th flip flop. The first flip flop in the chain represents the first state, the second represents the second state, and so on to the 15th flip flop which represents the last state. Upon reset of the state machine all of the flip flops are reset to '0' except the first in the chain which is set to '1'. The next clock edge arriving at the flip flops advances the one 'hot' bit to the second flip flop. The 'hot' bit advances in this way until the 15th state, after which the state machine returns to the first state.

An address decoder converts from binary or gray code to one-hot representation. A priority encoder converts from one-hot representation to binary or gray code.

In natural language processing, a one-hot vector is a 1 × N matrix (vector) used to distinguish each word in a vocabulary from every other word in the vocabulary. The vector consists of 0s in all cells with the exception of a single 1 in a cell used uniquely to identify the word.

Differences from other encoding methods

Advantages

Determining the state has a low and constant cost of accessing one flip-flop
Changing the state has the constant cost of accessing two flip-flops
Easy to design and modify
Easy to detect illegal states
Takes advantage of an FPGA's abundant flip-flops

Using a one-hot implementation typically allows a state machine to run at a faster clock rate than any other encoding of that state machine.^[2]

Disadvantages

Requires more flip-flops than other encodings, making it impractical for PAL devices
Many of the states are illegal

References

^ Harris, David and Harris, Sarah. Digital design and computer architecture (2nd ed.). San Francisco, Calif.: Morgan Kaufmann. p. 129. ISBN 978-0-12-394424-5.{{cite book}}: CS1 maint: multiple names: authors list (link)
^ Xilinx. "HDL Synthesis for FPGAs Design Guide". section 3.13: "Encoding State Machines". Appendix A: "Accelerate FPGA Macros with One-Hot Approach". 1995.

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[1] Harris, David and Harris, Sarah. Digital design and computer architecture (2nd ed.). San Francisco, Calif.: Morgan Kaufmann. p. 129. ISBN 978-0-12-394424-5.{{cite book}}: CS1 maint: multiple names: authors list (link)

[2] Xilinx. "HDL Synthesis for FPGAs Design Guide". section 3.13: "Encoding State Machines". Appendix A: "Accelerate FPGA Macros with One-Hot Approach". 1995.

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@@ Line 26: / Line 26: @@
 One-hot encoding is often used for indicating the state of a [[state machine]]. When using [[Binary number|binary]] or [[Gray code]], a [[Binary decoder|decoder]] is needed to determine the state. A one-hot state machine, however, does not need a decoder as the state machine is in the ''n''th state if and only if the ''n''th bit is high.
-A [[ring counter]] with 15 sequentially-ordered states is an example of a state machine. A 'one-hot' ( that is either upper part of lips or the lower one) implementation would have 15 [[flip flop (electronics)|flip flops]] chained in series with the Q output of each flip flop connected to the D input of the next and the D input of the first flip flop connected to the Q output of the 15th flip flop. The first flip flop in the chain represents the first state, the second represents the second state, and so on to the 15th flip flop which represents the last state. Upon reset of the state machine all of the flip flops are reset to '0' except the first in the chain which is set to '1'. The next clock edge arriving at the flip flops advances the one 'hot' bit to the second flip flop. The 'hot' bit advances in this way until the 15th state, after which the state machine returns to the first state.
+A [[ring counter]] with 15 sequentially-ordered states is an example of a state machine. A 'one-hot' implementation would have 15 [[flip flop (electronics)|flip flops]] chained in series with the Q output of each flip flop connected to the D input of the next and the D input of the first flip flop connected to the Q output of the 15th flip flop. The first flip flop in the chain represents the first state, the second represents the second state, and so on to the 15th flip flop which represents the last state. Upon reset of the state machine all of the flip flops are reset to '0' except the first in the chain which is set to '1'. The next clock edge arriving at the flip flops advances the one 'hot' bit to the second flip flop. The 'hot' bit advances in this way until the 15th state, after which the state machine returns to the first state.
 An [[address decoder]] converts from binary or gray code to one-hot representation.