Motorola 6845
The Motorola 6845 (commonly MC6845) is a video address generator first introduced by Motorola and used in the MDA, CGA and EGA video adapters, Amstrad CPC and BBC Micro. Its functionality was duplicated and extended by custom circuits in the VGA. It is related to the later 6545 manufactured by MOS Technology (Commodore Semiconductor Group) and Rockwell (in two variations) and was cloned as the Hitachi 46505.
It is also known as the 6845 CRTC or the CRTC6845, meaning cathode ray tube controller.
Although intended for designs based on the Motorola 6800 CPU and given a related part number, it has been used alongside various other processors.
Overview
The chip generates the signals necessary to interface with a raster display but does not generate the actual pixels, though it does contribute cursor and video-blanking information to the pixel video (intensity) signals. It is used to produce correctly timed horizontal and vertical sync and provide the address in memory from which the next pixel or set of pixels should be read. The process of reading that value, converting it into pixels, and sending it to a CRT is left to other circuits.
Interlaced and non-interlaced output modes are supported, as is a hardware text cursor. The sync generation includes generation of horizontal and vertical video blanking signals, which are used to condition the external pixel generation circuits. Also, an internal latch is provided which when triggered will duplicate and retain a copy of the video address so that it can later be read back by the CPU. This is useful for light pens and light guns which can function by sending a pulse to the 6845 when the electron beam passes, allowing a running program to read back the location that was pointed at. (Because of this feature, most computer video adapters using a 6845 included a light pen interface, though it was usually an internal connector on the board itself, not on the outside of the computer, and it was usually undocumented in the user manual.)
Because all aspects of video timing are programmable, a single machine can switch between NTSC and PAL timings in software. The 6845 can be used to drive monitors or any other raster display.
Internals
The chip has a total of 18 8-bit registers controlling all aspects of video timings. Only two addresses are exposed to external components - one to select which internal register is to be read or written to and another to access that register.
The 6845 is intended for character based displays. Every address it generates is composed of two parts - a 14 bit character address and a 5 bit row address. Using the full address range RA0-RA4:CA0-CA13 the 6845 can address 2^(14+5) = 512KiB of memory.
The character address increases linearly. When the chip signals horizontal sync it increases the row address. If the row address does not equal the programmatically set number of rows per character then the character address is reset to have the same value as it did at the beginning of the current scanline. Otherwise the row address is reset to zero.
If the character address is used to look up a character reference in RAM and the row address to index a table of character graphics in ROM an ordinary text mode display is constructed.
Linear framebuffers
As described above, the 6845 is not ordinarily able to provide large linear framebuffers. A design could use only the 14 bit character address and set the number of rows per character to 1 but it would be constrained to 16KiB of addressable memory.
A solution is found in the Amstrad CPC, which combines the row address and character address to provide linear scanlines within a non-linear buffer. It maps row address RA0-RA2 to memory address MA11-MA13 and character address CA0-CA10 to memory address MA0-MA10. This has the advantages of easier programming for non-character display and easy smooth horizontal scrolling but can impede smooth vertical scrolling.
Differences from the 6545
Although overwhelmingly compatible, a number of small variations exist between the 6845 and 6545.
The biggest difference is that the 6545 may be configured so that it has sole access to the address bus for video memory. Two additional registers are included for setting any address the CPU wishes to read and the chip alternates between outputting addresses for display generation and the display set for CPU access.
Smaller changes are that the MOS Technology and one variation of the Rockwell 6545 lack interlaced output support and all 6545s include an optional address skew, which delays display enable for one character cycle if set. This second feature was incorporated into later variations of the Motorola 6845.
The 6545 may be set to work in linear 14bit mode using a status bit. On the 6845 the same thing requires adjustment of the character height.
Tricks
The 6845 reads the start address for its display once per frame. However, if the internal timing values on the chip are altered at the correct time it can be made to prepare for a new frame without ending the current one - creating a non-continuous break in generated addresses midway through the display. This is commonly used by games to provide one moving area of the display (usually the play field) and one static (usually a status display).
Vertical scrolling appears constrained because only the character start address can be set and the row address is always zeroed at frame start, but by adjusting border times it is possible to shift the position the framebuffer is shown on the raster display for increments in between whole characters. With drawing of blank pixels at the screen edges, this can be made invisible to the user creating just the illusion of a smooth vertical scroll.