AES instruction set
Advanced Encryption Standard (AES) Instruction Set is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008[1]. The purpose is to improve the speed of applications doing encryption and decryption using the Advanced Encryption Standard (AES), similar to the PadLock engine found in current processors from VIA Technologies.
New instructions
| Instruction | Description |
|---|---|
| AESENC | Perform one round of an AES encryption flow |
| AESENCLAST | Perform the last round of an AES encryption flow |
| AESDEC | Perform one round of an AES decryption flow |
| AESDECLAST | Perform the last round of an AES decryption flow |
| AESKEYGENASSIST | Assist in AES round key generation |
| AESIMC | Assist in AES Inverse Mix Columns |
| PCLMULQDQ | Carryless multiply (CLMUL). See Intel website - Carry-Less Multiplication. |
CPUs with AES instruction set
Software supporting AES instruction set
- OpenSSL 1.1.0
- Everest 5.50
- The Bat! 4.3
- Linux Cryptographic API (requires 64-bit kernel) and all software using this API
See also
References
- ^ "Intel Software Network". Intel. Retrieved 2008-04-05.
- ^ "Striking a balance". Dave Christie, AMD Developer blogs. May 7, 2009. Retrieved 2009-05-08.
- AES instruction set whitepaper http://software.intel.com/file/20457 4.4 Mbyte, pdf