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This is an old revision of this page, as edited by Circuit dreamer (talk | contribs) at 07:51, 22 July 2014 (Diode-transistor logic: About the load). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

Welcome to Wikipedia again!

"I always liked the impossible... I found quite often impossible problems could be solved with extremely simple methods..."

How wonderful that sounds, William! Wikipedia should be proud when such remarkable personalities as you want to participate in it!

A few years ago, I followed with interest your professional comments, especially on the talk pages dedicated to TTL and ECL logic gates (e.g., in Archive_1). Unfortunately, no one paid any serious attention and do not reflect them in the Wikipedia articles...

I (Circuit dreamer) contributed closely in Wikipedia during 2006-2010 and then I managed to make a lot in its circuit section; see for example my list of contributions... and especially the articles about digital circuits.

But my efforts to find clear, simple and powerful explanations of basic circuit solutions were perceived by Wikipedians as original research. As a result, I was banned from editing and actually I abandoned Wikipedia...

Then I (Circuit-fantasist) entirely moved to Wikibooks where I created Circuit Idea - a book about great circuit ideas; see for example the story about ECL.

Best regards, Cyril (Circuit dreamer).

Thanks Circuit dreamer. I guess there are two of us banned from Wiki's logic circuit descriptions. It appears they prefer information from amateur handbooks to first hand knowledge. I just made a new comment about the DTL description. It is a disaster! I will check the sits you referenced. ThingMaker
I just looked at your Archive_1). It makes me want to go back into hiding!ThingMaker

Just to let you know that I moved your comment from the article itself on to the article's talk page: Noyster (talk), 22:02, 21 July 2014 (UTC)[reply]

I don't understand! As far as I know I put my comments on the Talk page. If I placed it on the article I regret the error.ThingMaker
Hi Thingmaker. Your story about the development of logic gates is just incredible... you have to publish it in some more suitable and reputable place... I just want to say a few words in defense of what is written by me in the DTL page:
"The two resistors R3 and R4 form a resistive summing circuit with weighted inputs that adds the negative bias voltage V− to the positive diode logic output voltage... As a result, the unipolar (positive) diode output voltage (about V+ for logical one and 1.0 V for logical zero) is converted into a bipolar voltage (a few volts above and below ground) to drive the output transistor"
I understand your reaction since the written is a bit unconventional explanation... but to be honest, it is still true... You are right that "R3 and R4 provide a current sum to drive the base"... but it is also true that actually they add voltages... R3 and R4 act as voltage-to-current converters that convert the diode output voltage and the negative bias voltage into currents... then these currents are summed (subtracted)... and the current sum drives the base. This summing circuit is so important that I have dedicated a separate story about it in Circuit Idea wikibook.
I understand very well the purpose of this resistive network and the additional negative supply - to drop the base voltage below the zero voltage... to make it negative... and thus to cut-off surely the transistor (especially if it was a germanium type)... You can think of this circuit also as a voltage divider with a "shifted ground". When its output voltage exceeds VBE0 (appr. 0.7 V), it is shorted by the forward-biased base-emitter junction; when it is below this threshold, the base behaves as an open circuit. A similar but not so reliable effect can be achieved by replacing R3 with a diode or a base-emitter junction (as in TTL).
I have considered this bias technique in RTL article as well. Regards, Circuit dreamer (talk, contribs, email) 07:28, 22 July 2014 (UTC)[reply]
(I have corrected your user name in the signature above (replaced "M" with "m")