Adrian Mihai Ionescu

Adrian Mihai Ionescu
Nationality	Romanian
Alma mater	Politehnica University of Bucharest National Polytechnic Institutes (France) Stanford University
Scientific career
Fields	Silicon nanotechnology, Radio Frequency MEMS and NEMS, Small Swing Switches, Modeling and Simulation of Solid-State Electronic Devices
Institutions	Swiss Federal Institute of Technology in Lausanne

Adrian (Mihai) Ionescu is a full Professor at the Swiss Federal Institute of Technology in Lausanne (EPFL) on a special contract.

Education

He received the B.S./M.S. and Ph.D. degrees from the Polytechnic Institute of Bucharest, Romania and the National Polytechnic Institute of Grenoble, France, in 1989 and 1997, respectively. He has held staff and/or visiting positions at LETI-CEA, Grenoble, France, LPCS-ENSERG, Grenoble, France and Stanford University, US, in 1998 and 1999. He was a visiting professor at the Tokyo Institute of Technology in 2012 and 2016.

Career

He is the founder and director of the Nanoelectronic Devices Laboratory (Nanolab: http://nanolab.epfl.ch/) of EPFL. Prof. Ionescu served as Director of the Doctoral Program in Microsystems and Microelectronics of EPFL and Director of the former Institute of Microsystems and Microelectronics of EPFL. His nanoelectronics research deals with beyond CMOS and More-Than Moore devices and technologies. His group pioneered steep slope transistors (tunnel FETs and ferroelectric FETs), MEMS and NEMS devices with a main emphasis on low power resonator concepts (vibrating body transistors) in order to achieve novel energy-efficient digital, analog, radio frequency and low-power sensing functions. He was/is the leader of many European projects focusing on low power nanoelectronics and nanotechnology for smart systems. He is an IEEE Fellow and he was Editor of IEEE Transactions on Electron Devices and a member of the PUB committee of IEEE –EDS). In recent years he served the Technical Committees of many IEEE conferences and, in 2016, he was the Technical Chair of IEEE SNW at IEEE VLSI Technology Symposium (USA), and the General Chair of the IEEE European Solid State Devices and Circuits Research Conference (ESSDERC/ESSCIRC 2016).

Ionescu has published more than 500 articles in international journals and conference proceedings (https://scholar.google.ch/citations?user=CDI07dYAAAAJ&hl=en&oi=ao).

He is the recipient of IBM Faculty Award 2013 for contributions to the Engineering of the recipient of André Blondel Medal 2009 of the Society of Electrical and Electronics Engineering, Paris, France.

Ionescu has been Scientific Board Member for Semiconductor Companies Associations MEDEA+ and CATRENE. He was the leader of the strategic report ’ Towards and Beyond 2015: technology, devices, circuits and systems’ provided to the European Commission and serving as roadmap to semiconductor industries (http://www2.imec.be/content/user/File/MEDEAreport.pdf ). He was the Swiss National Representative in the Scientific Board ENIAC, from 2006 to 2014. He is a Member of the Scientific Board of AENEAS (https://aeneas-office.org/ ) the Association of European Industry in micro and nanoelectronics enabled components and systems. In this quality he has been exposed to the elaboration of the European Strategic Research Agenda and implementation policies in the Field of Nanoelectronics, in close collaboration with all leading companies in the field.

Ionescu was involved in the preparation of the FP6, FP7 and H2020 Calls of the European Commission in the fields of Nanoelectronics, Micro/nanosystems and Future Emerging Technologies. He has served national government programs of Romania and Slovenia in their selection of research projects such as ICT and Smart Cities. He was appointed by the Romanian Ministry as a Member of National Council of Validations of University Titles in Romania.

Ionescu has been the main coordinator of FET Flagship Pilot Guardian Angels for a Smarter Life, an advanced research program involving a Consortium of 66 partners (leading European and global industries in field of semiconductors, telecommunications, sensors, health care and automotive, research institutes and universities), selected by the European Commission as one of the four leading finalists for future emerging technologies.

In 2015, he was elected as a member of the Swiss Academy of Sciences (SATW). In the same year he received the Outstanding Achievement Award of SATW for the successful coordination and delivery of the first national Swiss Technology Outlook, a document that summarizes the work of multi‐disciplinary team of experts and provides recommendations for Swiss policies on focused national technological priorities and investments in the digital economy era (http://www.satw.ch/outlook/SATW_Etude_TechnologyOutlook.pdf )

In 2016, he received an Advanced ERC (European Research Council) Grant for individual senior scientists in Europe to develop a 5-year research programs aiming at 100 millivolt switches and sensors for Internet-of-Things.

Field of research

As director of the Nanoelectronic Devices group from the Swiss Federal Institute of Technology in Lausanne (EPFL), Ionescu is focusing on these particular topics:

Beyond CMOS technology & devices

• Energy efficient digital and analog computation with steep slope switches: tunnel FETs and phase change switches
• Ultra-low power Tunnel FETs for biosensing and gas sensing

More-than-Moore devices & circuits

• RF MEMS & NEMS
• MHz to GHz SOI resonators
• Hybrid NEM-FET electronics

Non-silicon devices & circuits

• CNT resonators and circuit applications
• CNTs for programmable interconnects
• Graphene reconfigurable devices and quantum capacitors

Cooperation with international projects

Guardian Angels for a Smarter Life

Ionescu is the Director of the Guardian Angels for a smarter life FET Flagship project.

The project Guardian Angels for a Smarter Life is a research platform in nanoscience, zero-power research and advanced ICT headed by Ionescu (Swiss Federal Institute of Technology in Lausanne) and Prof Christofer Hierold (ETH Zurich). The project assembles a pan-European network - 28 academic, R&D and industrial partners from 13 European countries - to create intelligent and autonomous systems serving individuals in their daily lives. It will meet the technological challenge of weaving together energy efficient information processing, sensing, communication and energy harvesting.

The project goal is to develop environmentally-friendly, battery-free technologies for these electronic personal assistants, so that they will harvest their own energy rather than requiring an external power source.

The GA flagship project will show the feasibility and functionality of devices in three pre-defined generations of demonstrators: physical, environmental and emotional domains. The applications are based on the concept of a smarter life, e.g. a lifestyle that benefits from the instant availability of relevant information, more interconnectedness between devices fitted with all sorts of sensors, and intuitive usability.

E2SWITCH

The Nanolab at the Swiss Federal Institute of Technology in Lausanne (EPFL) is coordinating new European research project dubbed E2SWITCH. The project has revealed details about its plans to develop a next-generation chip technology called tunnel field-effect transistors (TFETs). The project also includes IBM, Forschungszentrum Jülich, the University of Lund, ETHZ, Imec, CCS, SCIPROM and IUNET. The project has been funded for up to 4.3 million euros over 42 months

The main goal is to try to reduce the consumption of electrical devices at the core level such as transistors and nanowires. By reducing the operating voltage of each device, the overall consumption will be greatly reduced.

Xsensio

Technical advisor and CSO of Xsensio SA.

Honors and awards

• Outstanding Achievement Award of Swiss Academy of Technical Sciences in 2015
• Recipient of the IBM Faculty Award in Engineering in 2013.
• Elected expert of the Swiss Technical Academy of Sciences, Switzerland, 2012.
• Certificate of Excellence in Future Emerging Technologies of the European Commission, FET Flagship Ceremony organized the European Commission, Budapest, May 3‐4, 2011.
• André Blondel Medal 2009: for remarkable contributions to the progress in engineering sciences in the domain of electronics from the Society of Electrical and Electronics Engineering (SEE, Paris), France.
• Elected Member of Scientific Committee of the Cluster for Application and Technology Research on NanoElectronics in Europe, (CATRENE): 2008 – now.
• Elected Member of European Nanoelectronics Initiative Advisory Council (ENIAC), Academic representative of Switzerland (Europe): 2006 – now.
• Elected Member of International Planning Working Group for Nanoelectronics: 2007‐ 2012.
• Annual Award of the Romanian Academy of Technical Sciences, 1994, for contributions to SOI technology.

Most cited publications

• Tunnel field-effect transistors as energy-efficient electronic switches, AM Ionescu, H Riel, Nature 479 (7373), 329-337 (2011).
• Double-Gate Tunnel FET With High-$\ kappa $ Gate Dielectric, K Boucart, AM Ionescu, IEEE Transactions on Electron Devices 54 (7), 1725–1733, (2007)
• Analytical modeling of single electron transistor for hybrid CMOS-SET analog IC design, S Mahapatra, V Vaish, C Wasshuber, K Banerjee, AM Ionescu, IEEE Transactions on Electron Devices 51 (11), 1772-1782 (2004).
• Suspended-gate MOSFET: bringing new MEMS functionality into solid-state MOS transistor, N Abelé, R Fritschi, K Boucart, F Casset, P Ancey, AM Ionescu, Electron Devices Meeting, 2005. IEDM Technical Digest. IEEE International Meeting, (2005).
• CMOS compatible fully integrated Mach-Zehnder interferometer in SOI technology, P Dainesi, A Kung, M Chabloz, A Lagos, P Fluckiger, AM Ionescu, P Fazan, IEEE Photonics Technology Letters 12 (6), 660-662 (2000).
• A new definition of threshold voltage in tunnel FETs, K Boucart, AM Ionescu, Solid-state electronics 52 (9), 1318-1323 (2008).
• Length scaling of the double gate tunnel FET with a high-k gate dielectric, K Boucart, AM Ionescu, Solid-State Electronics 51 (11), 1500-1507 (2007).
• Analytical modeling of the suspended-gate FET and design insights for low-power logic, K Akarvardar, C Eggimann, D Tsamados, YS Chauhan, ..., AM Ionescu, IEEE transactions on Electron Devices 55 (1), 48-59 (2008).
• Realization of multiple valued logic and memory by hybrid SETMOS architecture, S Mahapatra, AM Ionescu, IEEE transactions on Nanotechnology 4 (6), 705-714 (2005)
• Self-heating characterization and extraction method for thermal resistance and capacitance in high voltage MOSFETs, C Anghel, AM Ionescu, N Hefyene, R Gillon, European Solid-State Device Research, ESSDERC 2003.

External links

• EPFL NanoLab