Hilscher netx network controller
The netX network controller family (based on ASICs), developed by Hilscher Gesellschaft für Systemautomation mbH, is a solution for implementing all proven Fieldbus and Real-Time Ethernet systems. It was the first Multi-Protocol ASIC which combines Real-Time-Ethernet and Fieldbus System in one solution. The Multiprotocol functionality is done over a flexible cpu sub system called XC. Through exchanging some microcode the XC is able to realize beside others a PROFINET IRT Switch, EtherCAT Slave, Ethernet Powerlink HUB, PROFIBUS, CAN bus, CC-Link Industrial Networks Interface.
The Hilscher netX family
| Controller | netX 10 | netX 52 | netX 51 | netX 90[1] | netX 100 | netX 500 | netX 4100[2] | netX 4000 |
|---|---|---|---|---|---|---|---|---|
| CPU models | ARM 966/xPIC | ARM 966/xPIC | ARM 966/xPIC | 2* ARM Cortex®-M4 | ARM 926 + MMU/- | ARM 926 + MMU/- | ARM Cortex®-R7 | ARM Cortex®-R7 /
Dual Cortex®-A9 |
| CPU clock | 100 MHz | 100 MHz | 100 MHz | 100 MHz | 200 MHz | 200 MHz | 400 MHz | 400 MHz / 600 MHz |
| RAM / ROM | 396kB/64kB | 672kB/64kB | 672kB/64kB | 576kB+64kB/ 96kB | 144kB/32kB | 144kB/32kB | 2080kB/ 2x 128kB /2x 32kB L1 | 1568kB/ 2x 128kB /2x 32kB L1
512kB / Dual 2x 32 kB L1, 512 kB L2 |
| Host Interface Funktions | DPM/SPM/EXT/MEM | DPM/SPM/EXT/MEM | DPM/SPM/EXT/MEM | DPM/SPM | DPM/-/EXT | DPM/-/EXT | DPM(8/16/32-bit)/SPI/QSPI | DPM(8/16/32-bit)/SPI/QSPI |
| MemoryI/F Parallel/Serials | -/SQI XiP | -/SQI XiP | 8, 16, 32 Bit/ SQI XiP | SQI XiP | 8, 16, 32 Bit/- | 8, 16, 32 Bit/- | 16/32-bit | 16/32-bit |
| xC Channels | 1 | 2 | 2 | 2 | 3 | 4 | 4 | 4 |
| IEEE 1588 Sys Timer/EthernetPHY (10/100 mbps) | 1/Single-PHY | 2/Dual-PHY 10/100 | 2/Dual-PHY 10/100 | 2/Dual-PHY 10/100 | 1/Dual-PHY 10/100 | 1/Dual-PHY 10/100 | 1/Dual-PHY
MAC Dual 10/100/1000 |
1/Dual-PHY 10/100
MAC Dual 10/100/1000 |
| I²S/I²C/SPI/UART | -/1/1/2 | -/2/1/3 | -/2/1/3 | -/2/4/2 | -/1/1/3 | -/1/1/3 | -/3/2/4 | -/3/2/4
4/6/2/4 |
| CAN/MAC/LCD | -/-/- | 1/1/- | 1/1/- | 2/-/- | -/-/- | -/-/1 | 1/-/1 | 1/-/1 |
| IO-Link Master Ports | 4 | 4 | 8 | 8 | - | - | 8 | 8 |
| ADC Channels | 2*8 | - | - | 2*2 | 2*4 | 2*4 | 2*4 | 2*4 |
| USB 1.1 Device/Host | D/- | D/- | D/- | D/- | D/H | D/H | D/- | D/- |
| WDC/Timer Counters | 2/7 | 2/10 | 2/10 | 4*32-bit / 8*32-bit | 1/5 | 1/5 | 1/2 | 1/2 |
| MMIO*/GPIO*/PIO | 0/8/24 | 40/32/62 | 48/32/62 | 16/8/49 | 0/16/84 | 0/16/84 | 40 + 43 / 16 / 8 | 40 + 43 / 16 / 8 |
| Package Size (mm)/Type (pins) | 13*13/BGA(197) | 15*15/BGA(244) | 19*19/BGA(324) | 10*10/BGA(144) | 22*22/BGA(345) | 22*22/BGA(345) | 23*23/BGA(420) | 27*27/BGA(596) |
Multiplex Matrix IOs (MMIO)
The Multiplex Matrix is a set of PINs which could be configured freely with peripheral functions. Options are CAN, UART, SPI, I2C, GPIOs**, PIOs and SYNC Trigger.
GPIOs
The GPIOs from Hilscher are able to generate Interrupts, could count level or flags, or could be connected to a timer unit to auto generate a PWM. The Resolution of the PWM is normally 10ns. In some netX ASICS is a dedicated Motion unit with a resolution if 1ns is available.
References
- ^ "Smallest Multiprotocol SoC". Hilscher.com. Retrieved 2019-01-08.
- ^ "NETX 4100". Retrieved 2019-01-08.