ADMS

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ADMS is a public domain software to translate Verilog-A models into C-models which can be directly read by a number of SPICE simulators, including Spectre Circuit Simulator, Ngspice and HSpice.

Overview

ADMS stands for Automatic Device Model Synthesizer.[1] ADMS can read Verilog-A code, and generate compact models[2] in the form of C files. ADMS interpreter parses a Verilog-AMS file to build a data tree.[3] XML filters are applied on the tree to generate the output files.

ADMS substantially reduces the effort of circuit simulator developers to integrate device models - at the same time, it provides the option to compact model developers to use Verilog-A for model definition, making the model more robust and maintainable.[4]

ADMS is used by the open source SPICE simulator NGSPICE[5] to support a number of compact models. Following models are supported by NGSPICE using ADMS:[6]

  • MOS EKV (LEVEL=44)
  • MOS PSP102 (LEVEL=45)
  • BJT Mextram 504 (LEVEL=6)
  • BJT Hicum0 (LEVEL=7)
  • BJT Hicum2 (LEVEL=8)

Limitations

ADMS can not process all Verilog-A syntaxes. Specifically, the following are not supported:

  • V(..) <+ I(..)

Instead, this needs to be represented as a conductance expression (and not impedance).
i.e. I(..) <+ V(..)

  • I (..) probes
  •   for loop

References

  1. ^ http://www.mos-ak.org/boeblingen/slides/P3_Sukharev_MOS-AK_Boeblingen.pdf
  2. ^ Transistor model#Models for circuit design .28compact models.29
  3. ^ "Archived copy". Archived from the original on 2013-09-28. Retrieved 2014-01-09. {{cite web}}: Unknown parameter |deadurl= ignored (|url-status= suggested) (help)CS1 maint: archived copy as title (link)
  4. ^ "Archived copy" (PDF). Archived from the original (PDF) on 2016-03-04. Retrieved 2015-04-27. {{cite web}}: Unknown parameter |deadurl= ignored (|url-status= suggested) (help)CS1 maint: archived copy as title (link)
  5. ^ http://ngspice.sourceforge.net/adms.html
  6. ^ http://ngspice.sourceforge.net/admshowto.html

External links

See also

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