Intel 1103

Intel 1103

DRAM memory cell of Intel i1103 chip
Media type	10 μm p-MOS DRAM
Capacity	1 Kilobit
Standard	18-pin DIP
Developed by	Intel
Usage	HP 9800 series, PDP-11 and others

The Intel 1103 is the earliest known Dynamic random-access memory integrated circuit, and widely regarded as the chip that killed magnetic-core memory. While introduced in October 1970, production yields were poor at first, and it wasn't until the fifth stepping of the production masks that it was widely available, sometime in 1971.

Development

Some time in 1969, William Regitz and his colleagues at Honeywell invented a three-transistor dynamic memory cell and began to canvass the semiconductor industry for a producer. The recently founded Intel Corporation responded and developed the 1024-bit chip numbered i1102 designed by Joel Karp, working closely with William Regitz. The i1102 was not successful for numerous reasons, but most importantly its aggressive design, using a "1X" - "1Y" cell arrangement, wherein the same selection line used to read the cell also served is its write selector. Thus the i1102 used a multi-level source called "Ivg" (Intermediate Voltage Generator) to draw the distinction between these two operation conditions. Designing this Ivg for adequate margins over supply and processing variations proved to be impossible. The i1102 (and its successor the i1103) introduced a requirement for substrate bias voltage, which is why the package had 18 pins instead of the expected 16.) Joel Karp also quietly began the development of a 1024 bit version of the chip, working with Leslie Vadasz and Tom Rowe on a three-transistor "2X" - "2Y" cell that solved several problems. Bob Abbott was given the project of designing the i1103 early in 1970, but shortly after John Reed joined Intel in mid-1970, he was tasked with finishing the i1103 design, evaluating the first silicon devices, and bringing the i1103 to production. At first silicon in October, the chip turned out to be extremely sensitive to clock timing, (i.e., the overlap Tov between the Precharge and Cenable clocks, discovered by George Staudacher) taxing the limits of the era's test equipment, and it had poor yields. Despite these concerns and the vehement objections of Vadasz and Reed, Vice President of Marketing Bob Graham launched the 1103 chip to get it on the market ahead of potential competitors. Fortunately, early sales were slow, giving the small development team time to revise the design, and the fourth or fifth stepping in 1971 led to the chip's blazing success. It was left to Reed, Robert Noyce and Marketing VP Bob O'Hare to sell the superior 1103 to the reluctant engineers at Honeywell to release Intel from the failing 1102 design. The i1103 development team included electronic technician Paul Metrovich and layout designer Pat Earhart, along with mask cutters Barbara Maness and Judy Garcia.

Technical Details

tRWC	580 ns	Random read or write cycle time (from one +ve Precharge edge to the next)
tPO	300 ns	Access time: Precharge High to valid data out
tREF	2 ms	Refresh time
VCC	16 V	Supply voltage
p-MOS	10 µm	Production process (silicon gate MOSFET)
Capacity	1024x1	Capacity x bus width