MOS composite static induction thyristor

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MOS composite static induction thyristor (CSMT or MCS) is a combination of a MOS transistor connected in cascode relation to the SI-thyristor.[1]
The SI thyristor (SITh) unit has a gate to which a source of MOS transistor is connected through a voltage regulation element. The low conduction loss and rugged structure MCS make it more favorable than conversional IGBT transistors.

In the blocking state nearly the complete voltage drops at the SITh. Thus the MOSFET is not exposed to high field stress. For fast switching the MOSFET with only 30-50 V blocking voltage is able. In IGBT, charge carrier concentration at emitter side in n-base layer is low as holes injected from collector easily pass to emitter electrode through p-base layer. Thus the wide-base pnp transistor operates by virtue of its current gain characteristics causing the rise collector-emitter saturation voltage.

In an MCS the positive difference between the voltage of regulation element and conduction voltage drop of MOSFET is applied to location between the collector region and emitter region of the pnp transistor. Hole concentration is accumulated at emitter side in n-base layer because of impossibility of the hole flow through forward bias collector-base junction of the pnp transistor. Carrier distribution in n-base is similar to that of saturation bipolar transistor and low saturation voltage of MCS, even at high voltage ratings, can be achieved.

References[edit]

  1. ^ "MOS composite static induction thyristor". www.freepatentsonline.com. Retrieved 2009-02-21.