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NEC SX-ACE

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This is an old revision of this page, as edited by Kiralexis (talk | contribs) at 00:05, 20 May 2015 (Undid revision 651007688 by 92.30.187.76 (talk) - it's gigabytes. 256GB/s per socket per every source.). The present address (URL) is a permanent link to this revision, which may differ significantly from the current revision.

The SX-ACE is a vector supercomputer from NEC Corporation. It features NEC's first multi-core vector System on a Chip design,[1] with four cores. The SX-ACE runs at 1 GHz, has peak performance of 64 GFLOPS per core, and has 64 gigabytes per second of memory bandwidth per core. Four cores make up a shared-memory node, and 64 nodes can fit in a rack for a total performance of 16 TFLOPS per rack.[2] The SX-ACE was released in 2013. NEC roadmaps indicate that the successor to the SX-ACE will be released around 2017.[3]

See also

References

  1. ^ NEC Developing Next Generation Vector Supercomputer
  2. ^ SX-ACE Brochure
  3. ^ "Roadmap" image in NEC SX-ACE Photos


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