Advanced Amiga Architecture chipset
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The AAA chipset (Advanced Amiga Architecture) was intended to be the next-generation Amiga multimedia system designed by Commodore International. Initially begun as a secret project, the first design discussions were started in 1988, and after many revisions and redesigns the first silicon versions were fabricated in 1992–1993. The project was stymied in 1993 based on a lack of funds for chip revisions.
At the same time AAA started first silicon testing, the next generation Commodore chipset project was in progress. While AAA was a reinvention and huge upgrade of the Amiga architecture, project Hombre was essentially a clean slate. It took what was learned from Amiga and went in new directions, which included an on-chip CPU with a custom 3D instruction set, 16-bit and 24-bit chunky pixel display, and up to four 16-bit playfields running simultaneously. Hombre also embraced the PCI bus, which was seen as the future for main board interconnect and expansion going forward.
Design goals
[edit]AAA was slated to include numerous technologies.
- 32-bit CPU bus
- 32-bit and 64-bit graphics bus options.
- 256 deep CLUT entries 25-bit wide each (256 indirect colors indexed through 24-bit palette with extra genlock bit like AGA has). This mode runs in the native AmigaOS display.
- Direct 16 bit-planes planar pixels without CLUT entries, since this mode doesn't contain a palette or a CLUT it requires some kind of ReTargetable Graphics (RTG) driver like chunky modes.
- New Agnus/Alice replacement chip 'Andrea' with an updated 32-bit blitter and Copper which can handle chunky pixels.
- A line-buffer chip with double buffering called 'Linda' provides higher resolution (up to 1280 × 1024). Linda also decompresses two new packed pixels (PACKLUT, PACKHY) on the fly.
- Updated version of Paula called 'Mary' with 8 voices that can be assigned either to left or right channel; each channel has 16-bit resolution with up to 100 kHz sample rate; additionally it does 8-bit audio sampling input.
- Direct Chunky 16-bit pixels (15 bits for 32768 colors and 1 bit for genlock overlay), provided by custom chip 'Monica', this mode requires RTG driver.
- New 24-bit hybrid mode (with a chunky/planar properties) consisted of 3 byte-planes of 8 bit chunks each. Like chunky modes it requires RTG driver for lacking CLUT.
- New 8/4/2 bit Half-Chunky Graphics Mode which indirect through CLUT like 8-bit planar modes do.(requires RTG)
- New packed (compressed) pixels (2-bit PACKLUT and 4-bit PACKHY) decompressed by Linda to 8-bit half-chunky or 24-bit Hybrid pixels respectively, used for speeding up animations.
- A reversible pixel clock for a frame grabber (a video capture device) in chunky modes (this only work with VRAM systems).
- New Hold-and-Modify modes (HAM-8 chunky and HAM-10 for 24bit / 16.8 million colours).
- Sprites size can go up to 128 pixels in width with any height.
- Dual 8-bit playfields.
- VRAM Chip Memory systems with optional 32/64 bit DRAM chip memory (for lower cost systems).
- 12× to 20× memory bandwidth of Chip RAM access of ECS.
- 8× blitter speed increase of AGA/ECS blitter.
- Direct support for 4 MB raw floppy disks (2.88 MB IBM-style-formatted and all known format including Mac floppies), with a direct interface to a raw CD-ROM drive or Digital Audio Tape (DAT) and a digital radio interface, managed by Mary chip (port and audio peripheral controller).
- Asynchronous design managed by Linda and Andrea makes AAA pixel clock independent of its bus clock so the chipset can work with any CPU (including any RISC processor).
- The chipset would include up to 1 million transistors in its 64-bit dual-system configuration (total).
- Up to 16 MB ChipRAM (graphics memory) in dual-systems.
- Two four-byte buffered FIFO serial UARTs, one of these UART is in the same RGA address as the original Paula UART.
- A built-in genlock.
- 40 on-demand DMA channels dynamically allocated by Andrea.
- 64-bit pixel bus with 114 MHz pixel clock in dual systems which makes 1280×1024 @72Hz screens possible.
- 128-bit long memory bus bursts
The initial chipset run has a number of early chip problems. The LUT was scrambled, so while it was possible to put up images on the screen in test systems, it was necessary to run a bit-skiggling[clarification needed] filter that re-arranged the color to work with the existing hardware. There was a bug in the Andrea memory controller that required a FIBed die locked into either DRAM or VRAM mode. There was a bug in the Andrea bus control logic that prevented Andrea's data bus from going tri-state during DMA reads from the other chips. That prevented some important bits of the functionality of the other chips from being tested.
Three prototypes called 'Nyx', meaning "night" in Classical Greek, were built as technology demonstrators and debugger boards for the new chips. However Nyx was never intended as the final production machine, AAA systems would have been based around the Acutiator architecture designed by Dave Haynie. Rather, the Nyx system was a test bed for the AAA chips and some other new ideas at Commodore, including custom memory modules for Chip RAM, Kickstart ROM on a module (with support for Flash), a multiple simultaneous pixel clock system, a low cost wired, self-terminating point to point LAN,
Commodore declared bankruptcy before designs were completed; some of the focus on AAA chips moved to creating a radically different 64-bit design based on a modified PA-RISC 7150 CPU with added graphics instructions and video pipelines (See Hombre chipset). Fully functioning AAA chips were never produced, though they were much talked about in the trade press. Numerous plans for purchasing Amiga and salvaging the technology came and went after Commodore's demise; all of them including the realization that for the Amiga to stay competitive, the development and release of AAA or Hombre would have to be one of their overriding goals.
See also
[edit]
- Original Amiga chipset
- Amiga Ranger Chipset
- Enhanced Chip Set
- Amiga Advanced Graphics Architecture
- Hombre chipset
- List of home computers by video hardware