Talk:ESP32

Computing Low‑importance

	This article is within the scope of WikiProject Computing, a collaborative effort to improve the coverage of computers, computing, and information technology on Wikipedia. If you would like to participate, please visit the project page, where you can join the discussion and see a list of open tasks.ComputingWikipedia:WikiProject ComputingTemplate:WikiProject ComputingComputing articles
Low	This article has been rated as Low-importance on the project's importance scale.
	This article is supported by Computer hardware task force (assessed as Low-importance).

InfoBox: Successor

Should the ESP-32-S2 link to the section on this page discussing it? Or is it notable enough for its own article? SerahTheLioness (talk) 17:29, 7 March 2021 (UTC)[reply]

The ESP32 has a Xtensa LX6 core, the ESP32-S2 and ESP32-S3 have LX7 cores. No much difference. More difference have ESP32-C3 and ESP32-C6 with RISC-V cores. But the "family signature" is on-chip Wifi and Bluetooth radio and how program memory is copied from flash to internal program memory (cache). Keep the ESP32s together. AndreAdrian (talk) 23:13, 22 July 2021 (UTC)[reply]

ESP32 RAM

The useable RAM for data is 160 KByte static RAM and 160 KByte heap RAM. See https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/system/mem_alloc.html#available-heap AndreAdrian (talk) 17:21, 20 July 2021 (UTC)[reply]

Expressif

Link is wrong. Grel (talk) 02:04, 19 October 2023 (UTC)[reply]