User:RDBrown/HP3000-WCS-Microcode

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In March 1982, Hewlett-Packard announced the HP 3000 Series 64, an ECL implementation with a WCS.[1]
September 1985 brought the announcement of the Series 37, a low-cost gate array implementation which eschewed the usual separate control processor for booting and used an initial bootstrap from the 32-bit wide ROMs to load the 64-bit wide boot microcode into the WCS.[2]

It's unlikely that the MPE based HP 3000 Series 64 microcode development system (MDS) software has survived, but an HP internal 543 page assembly listing exists.[3] The Series 37 Design Capture and Documentation (DCDF) tool for capturing designs for simulation in FTL (IBM 370) on an Amdahl V6 is also unlikely to have survived. Unlike the Series 64 listing, only a single line example is shown in the HP Journal for the Series 37 microcode.

The WCS data needs to be recorded on the backup tapes. The System Tables manual describes the Sysdump (Backup) format describes the tape format and the WCS data can be included as part of the first file on the tape, but I haven't seen that in the tape images I've seen. The second file is a concatenation of a list of essential system files and does include the WCS files. The files seem to be dumped as they would be in the Store part of the backup, including the 256 byte (MPE sector) file label. So SYSWCS64.PUB.SYS for Series 64, 68 and 70; SYSWCS37.PUB.SYS for the Series 37 and direct successors. WCSLE1 and WCSLE2 for the Series 37 successors. The files are single extent with 128W FB (256 bytes) records, and a zero file code. The first 256 byte record contains the version and probably a checksum. Assuming the data is 64-bit horizontal microcode the maximum is 10240 entries.

WCS Files
Filename Date Version Data size MD5 Source tape
SYSWCS64 1983-074 PR0903A 57856 9bbe23656aa61fb23351b8b8a9951742 32099-11009_MPE_IV_2244
SYSWCS64 1983-136 PR2312A 57856 69d809609e4ff5964a72c998058945d0 32033-11003_MPE_IV
SYSWCS64 1984-004 PR2318A 57856 ab9b59cd724659f6763daf37abbc80e4 32098-11003_2338
SYSWCS64 1984-264 pr2419a 58368 b55a5d00b7f5b3066826a0386903bfa8 32033-11010_vp-d-1_fos
SYSWCS64 1987-016 2833A 66560 953471cffece4e3fb2cb67c7007f84e9 v-delta-8_fos_2944
SYSWCS64 1987-016 cxa638a 66304 9bf49dca2afc4cea98151cb27d22c6b0 ub-delta-1_fos_2642
SYSWCS64 1988-159 2805A 66304 5e15376760a122f15099c617ac853440 v-delta-2_fos_2814

v-delta-3_fos

SYSWCS64 1989-145 2833A 66304 5c7d16e391abe087211b3a9fbc9dc4e0 v-delta-5_fos_2902
SYSWCS64 1990-113 2833A 66560 df0079446c945ecf91d04097dcc49639 v-delta-9_fos_32033-10024_3010
SYSWCS64 1990-250 2833A 66560 9ac00f6cf121f0db1d2f1301b38b0140 32033-10082_platform_1p_fos_34

er_3035

SYSWCS64 1992-225 wcx3033a 66560 d7864c56fc5af05820d62a9730d8feb1 32033-10430_MPE_V_Rel_2P_3237
SYSWCS37 1987-016 M06.08 82176 bb8f5773e6efa320ae22a5419383e70e ub-delta-1_fos_2642
SYSWCS37 1988-159 M06.10 82176 ea7233c3fe085916b53532fba53c4c88 v-delta-2_fos_2814

v-delta-3_fos v-delta-5_fos_2902

SYSWCS37 1989-353 M06.15 82176 d140c56d5b26dcc2dac918e12f752ac6 32033-10430_MPE_V_Rel_2P_3237

v-delta-8_fos_2944 v-delta-9_fos_32033-10024_3010 32033-10082_platform_1p_fos_34er_3035

WCSLE1 1987-016 M30.14 82176 50e37d18f35728c767995fbe8759e70c ub-delta-1_fos_2642
WCSLE1 1988-159 M30.17 82176 1497c8771666a19d9a3353fd9d92549b v-delta-2_fos_2814

v-delta-3_fos v-delta-5_fos_2902

WCSLE1 1989-353 M30.20 82176 543bb46a70e61807ba31c02b1b9f6ffc 32033-10430_MPE_V_Rel_2P_3237

v-delta-8_fos_2944 v-delta-9_fos_32033-10024_3010 32033-10082_platform_1p_fos_34er_3035

WCSLE2 1987-016 M50.28 82176 7d809ae17e1e3776be982edfb0105ee1 ub-delta-1_fos_2642
WCSLE2 1988-159 M50.30 82176 3e74d482ca1f5f34dc75f1933c0e715f v-delta-2_fos_2814

v-delta-3_fos v-delta-5_fos_2902

WCSLE2 1989-353 M50.34 82176 78fb826dd55624a91a0d7609103994b4 32033-10430_MPE_V_Rel_2P_3237

v-delta-8_fos_2944 v-delta-9_fos_32033-10024_3010 32033-10082_platform_1p_fos_34

Between the first dated and last dated versions, excluding the first 256 bytes containing the version and checksums SYSWCS37 47 64-bit wds, WCSLE1 44, WCSLE2 49. Between the first and last WCSLE1 and WCSLE2 versions 186, less than the 600 between the first 2 SYSWCS64 version. Assuming that 0xa5a5a5a5a5a5a5a5 is a NOP, the first SYSWCS37 has 8867 64-bit words and WCSLE1, 9019. When including offsets the SYSWCS37 and WCSLE1 differ by 6330, but excluding offsets only by 462. This suggests that SYSWCS37 and WCSLE1 & WCSLE2 share the same 64-bit microcode, but perhaps the code was restructured over and above any necessary changes for the new machines between SYSWCS37 and WCSLE1.

Series 37[edit]

La Fetra, Jr., F.E (September 1985). "Using a Translator for Creating Readable Microcode". HP Journal. 36 (9): 10. 

                           LABEL... A.. B.. C.. ADD IN I.. R-FCN-XCNTR-SEC X.. SPEC JTD JFD CONSTANT
0000: 1207 0555 1880 FFFF  LOOP     R1  R2  R0  R9  -1 R0    SZL Z5    S5  R1  JL=0 R8  R15 LOOP

Define Counter = R0,
       Left = R1, Right = R2;
Loop:
 Dec(counter) -> counter/	*Decrement
  Add(R10,R11) -> ADR/		*Computer address w/ADD
  ExtractR(Left||RIght(10..20)) -> Left/	*use extractor
  If Logic=0 then ReturnSub1 else Loop;		*IF.. THEN.. ELSE

Undefine counter,left,right

La Fetra, Jr., F.E; Shaker, Chris (September 1985). "Booting 64-Bit WCS Words from a 32-Bit Wide ROM Word". HP Journal. 36 (9): 12. 

ABUS         2 of  4  bits used
BBUS         4 of  4  bits used
CBUS         1 of  4  bits used
ASTOR        0 of  2  bits used
INC/DEC      0 of  2  bits used
ISTOR        2 of  4  bits used
Indirect     0 of  1  bits used
X-Control   12 of 12  bits used
XSTOR        3 of  4  bits used
Parity       1 of  1  bits used
Special      1 of  6  bits used
Jump         4 of  4  bits used
Constant     0 of 16  bits used
            ———————————————————
            30 of 64  bits used

Parrish, W.M.; Decker, E.B.; Wong, E.G. (September 1985). "Creative ways to obtain Computer System Debug Tools". HP Journal. 36 (9): 18. Fig. 2 Maintenance panel firmware displayCS1 maint: multiple names: authors list (link) 

TEMP R0: 061E   SJ1  R8: 5DF1   F0: 1  >0: 1  M:  1   BNKP: 0000   ICS: AAE0
P    R1: 0002   ADR  R9: 020A   F1: 1  BT: 0  I:  1   BNKD: 0000   DSP: 55E1
SM   R2: 0202   ADN R10: 0663   F2: 1  DV: 0  T:  1   BNKS: 0000   LP : AAE2
Q    R3: 0052   AUG R11: 0002   CI: 0  L0: 1  R:  1   BNKA: 0000   CPP: 55E2
DB   R4: 0202   STA R12: FFFF   CO: 0  FC: 1  O:  1   LAST: A      DL:  FFFF
IR   R5: 0002   FLG R13: E098   OV: 0  I0: 0  C:  1                Z:   5555
XCN  R6: 0000   MPC R14: 5DFA   <0: 0  CT: 0  CC: 3   OPA:  0160   PB:  30F8
SJ2  R7: 5F79   CON R15: 0000   =0: 0  SB: 0  SG: FF  OPB:  0000   PL:  0000
                                                                   X:   55EB
                                       TOSA: 0000    SR: 0         INV: 8090
                                       TOSB: 555A    NMR:0        WCS BKPT  
                                       TOSC: 0000    BDS:0       8001P  FFFF
MWA: 5DF9                              TOSD: 0000                53AEP  FFFF
MWR: FF03   00FF   6098   FFFF                                   FFFF   FFFF
A.. B.. C.. ADD IN I.. R-FCN-XCNTR-SEC X.. SPEC JTD JFD CON      FFFF   FFFF
R15 R15 R0      -1 R0    RRF $FF       R6  JBT  R7  R14 $0000    FFFF   FFFF

STATE:         U_HLT     11:14:14
U (MICRO) BREAKPOINT (SET)  <WCS ADDR> [,<DEC COUNT>] [;T]
4366

Counts  64-bit Microinstruction # ub-delta-1_fos_2642 SYSWCS37
   1374 a5a5a5a5a5a5a5a5
     51 fff0f000f005b86b
     47 fff0f0ffa800ffff
     22 fff8f000f000ffff
     22 ff131000f005b86b
     20 bf21a420b000ffbf
     19 fff0f0ff0800ffff
     16 5ff0f7a07c6a793f
     15 fd139400d6002fe7
...
                                # ub-delta-1_fos_2642 WCSLE1
   1222 a5a5a5a5a5a5a5a5
     51 fff0f000f005b85b
     47 fff0f0ffa800ffff
     22 fff8f000f000ffff
     22 ff131000f005b85b
     20 bf21a420b000ffbf
     19 fff0f0ff0800ffff
     16 fff0f000f800ffff
     16 5ff0f7a07c6a793f
     15 fd139400d6002fe7
...
                                # ub-delta-1_fos_2642 WCSLE2
   1229 a5a5a5a5a5a5a5a5
     51 fff0f000f005b85b
     47 fff0f0ffa800ffff
     23 fff0f000f800ffff
     22 fff8f000f000ffff
     22 ff131000f005b85b
     20 bf21a420b000ffbf
     17 fff0f0ff0800ffff
     16 5ff0f7a07c6a793f
     15 fd139400d6002fe7

"7. How the Series 37 SPU Works". Series 37 System Processing Unit: Self-Paced Hardware Training Guide (PDF). HP 3000 Computer Systems. Hewlett-Packard. June 1984. pp. 7-1–7-8 (78–83). 32450+49A-90001.

Engineers mentioned: Frederic C. Amerson —; Patria G. Alvarez; John R. Obermeyer; Frank E La Fetra, Jr. (Skip); Paul L. Rogers; James H. Holl; Malcolm E. Woodward; Edwin G. Wong — diagnostic microcode S37; William M. Parrish; Eric B. Decker — microcode for 37, 64, 68; Paul Smythe; Greg Gilliom; Brian Feldman; Norm Galassi; Frank Hublou; Daryl Allred; Barry Shackleford;

Series 64[edit]

PAGE 1                HP 3000 Series 64/68/70 Microcode                                                    10/ 2/86    9:26 AM
 RECORD    C.S.       *********** ALU A ***********  ************* ALU B *******************
   NO      ADDR  LABL RREG SREG FUNC SFNC STOR SPSK  RREG SREG FUNC SFNC STOR SPSK SPEC SKIP  COMMENT
ddddd      XXXX  **************************************************************************

Murillo, Richard D. (March 1982). "Dual ALU Micromachine has powerful development tools". HP Journal. 33 (3): 5–6. Fig. 1. Development sequence using MDS, the HP 3000 Series 64 microcode development system. 

RA 0000  SR    7  SPOA 0000  BKX3 0000    DL       03F0  PB  0000 1000  NIR  0200
RB 0000  ESR   7  SP1B 0000  BKX4 0000    DB  0000 0400  P        10CD  CIR  0200
RC 0000  NM    0  SP2B 0000  BKX5 0000    0        D400  PL       2CBB  DSPL   00
RD 0000  ENM   0  SP3B 0D40  BKX6 0000    SM       D400                 X    0000
RE 0001  RAC   0  SP4B 0000  BKX7 0000    Z   0000 0E00  STA MITROCE 03
RF 0000
RG FFFF  CTR  00  CTRX 00  FLAGS 12345    CAR 0000 10CD      YRA  10CC  OPA  01C0
RH 0000                                   PDB      10CD      YRB  10CD  OPB  0200
  RAR 0703    RREG SREG FUNC SHFT STOR SPSK   RREG SREG FUNC SHFT STOR SPEC SKIP
R3ADR 0008    XC   DB   JSZ  0012      TEST        P    INC       P    RONP
R2ADR 0694    RD   RB   SUB            NOFL   RC   RA   LINK      SP1B EPP4
R1ADR 0695              ADD            UNC         UBA  ADD            CCA
 VBUS 0696    RREG SREG UBR  O C      N       RREG SREG UBB  C        N
              0000 0000 0000 0 1      0       0000 0000 0000 1        0

0006 38e57110ccf3e40c  # $LUT INSTR=NOP 0 000 000 000 xxx xxx ENTRY=NOP, DSPL=6
Counts  64-bit Microinstruction # 32099-11009_MPE_IV_1of2_2244 (Count of uniq instr values)
     46 38e57110ccf3e40c
     32 0001000200030004  Filler?
     19 5ca5611ebcf3ad24
     16 03841e7003841e70
     16 03840e6003840e60
     16 037e0f70037e0f70
     15 5ce571100cf3e40d
     15 0000011800000118
     14 4ca5631e9ef3f406
     14 28e571100cf3e40d
     12 38e57104ccf3cc12
     12 38e57010ccf3e40d
     11 5525611e0cf3dd15
     11 38e57105ccf3e4f4
     10 38e83110ccf3e40c

"3. CPU and Cache Memory". Series 64 Reference/Training Manual (PDF). HP 3000 Computer Systems. Hewlett-Packard. April 1983. pp. 3-01–3-45. 30140-90005.

  • "3-13 LUT store and parity checker": 3-10. Cite journal requires |journal= (help)
  • "3-31 Microsquencer Control": 3-13. Cite journal requires |journal= (help)
  • "3-31 Jump and Skip Conditions": 3-13. Cite journal requires |journal= (help)
  • "3-33 Jumps to Subroutines": 3-14. Cite journal requires |journal= (help)
  • "3-34 Returns to Subroutines": 3-14. Cite journal requires |journal= (help)

References[edit]

  1. ^ "HP 3000 Series 64" (PDF). HP Journal. 33 (3). March 1982.
  2. ^ "HP 3000 Series 37" (PDF). HP Journal. 36 (9). September 1985.
  3. ^ HP 3000 Series 64/68/70 Computer Systems Microcode Manual (PDF) (2nd ed.). Hewlett-Packard. October 1986. 30140-90045.

External Links[edit]

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