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User:Saung Tadashi/Clegg integrator

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Clegg integrator or reset integrator[1] is an analog integrator used in the design of controllers for control systems. It was proposed by J. C. Clegg in 1958.[2]

Definition

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The Clegg integrator can be described by the following equations:

where e is the error input to the integrator and u is the output. The reset happens exactly at the time when there is a zero crossing of the input.

TODO

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  • Add circuit implementation[3][4]
  • Add describing function analysis

See also

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References

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  1. ^ Baños, Alfonso, 1965- (2012). Reset control systems. Barreiro, Antonio. London: Springer. ISBN 9781447122500. OCLC 758652894.{{cite book}}: CS1 maint: multiple names: authors list (link) CS1 maint: numeric names: authors list (link)
  2. ^ Clegg, J. C. (1958). "A nonlinear integrator for servomechanisms". Transactions of the American Institute of Electrical Engineers, Part II: Applications and Industry. 77 (1): 41–42. doi:10.1109/TAI.1958.6367399. ISSN 0097-2185.
  3. ^ Zaccarian, L.; Nesic, D.; Teel, A.R. (2005). "First order reset elements and the Clegg integrator revisited". Proceedings of the 2005, American Control Conference, 2005. Portland, OR, USA: IEEE: 563–568. doi:10.1109/ACC.2005.1470016. ISBN 9780780390980.
  4. ^ Prieur, Christophe; Queinnec, Isabelle; Tarbouriech, Sophie; Zaccarian, Luca (2018). "Analysis and Synthesis of Reset Control Systems". Foundations and Trends® in Systems and Control. 6 (2–3): 117–338. doi:10.1561/2600000017. ISSN 2325-6818.