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Zero-capacitor (registered trademark, Z-RAM) is a dynamic random-access memory technology developed by Innovative Silicon[1] (defunct) based on the floating body effect of silicon on insulator (SOI) process technology. Z-RAM has been licensed by Advanced Micro Devices for possible use in future microprocessors. Innovative Silicon claims the technology offers memory access speeds similar to the standard six-transistor static random-access memory cell used in cache memory but uses only a single transistor, therefore affording much higher packing densities.


Z-RAM relies on the floating body effect, an artifact of the SOI process technology which places transistors in isolated tubs (the transistor body voltages "float" with respect to the wafer substrate underneath the tubs). The floating body effect causes a variable capacitance to appear between the bottom of the tub and the underlying substrate, and was a problem that originally bedeviled circuit designs. The same effect, however, allows a DRAM-like cell to be built without adding a separate capacitor, the floating body effect taking the place of the conventional capacitor. Because the capacitor is located under the transistor (instead of adjacent to, or above the transistor as in conventional DRAMs), another connotation of the name "Z-RAM" is that it extends in the negative z-direction.

The reduced cell size leads, in a roundabout way, to Z-RAM being faster than even SRAM[2] if used in large enough blocks. While individual SRAM cells are sensed faster than Z-RAM cells, the significantly smaller cell reduces the size of Z-RAM memory blocks and thus reduces the physical distance that data must transit to exit the memory block. As these metal traces have a fixed delay per unit length independent of memory technology, the shorter lengths of the Z-RAM signal traces can offset the faster SRAM cell access times. For a large cache memory (as typically found in a high-performance microprocessor), Z-RAM offers equivalent speed as SRAM but requiring much less space (and thus cost). Response times as low as 3 ns have been claimed.

SOI technology is targeted at very high performance computing markets and is relatively expensive compared with more common CMOS technology. Z-RAM offers the hope of cheaper on-chip cache memory, with little or no performance degradation, a compelling proposition if the memory cell can be proven to work in production volumes.

In March 2010, Innovative Silicon announced it was jointly developing a non-SOI version of Z-RAM that could be manufactured on lower cost bulk CMOS technology.

AMD has licensed the second generation Z-RAM [3] to research it for potential use in their future processors, but is not planning to start using it.[4]

DRAM producer Hynix has also licensed Z-RAM for use in DRAM chips.[5]

Innovative Silicon was closed on June 29, 2010.[citation needed] Its officers have left, and its patent portfolio was transferred to Micron Technology in December 2010.[6]


  1. ^ "Company Overview of Innovative Silicon, Inc.". Bloomberg L.P. Retrieved 2015-06-29. 
  2. ^ Chris Hall (2006-03-28). "The case for Z-RAM: Q&A with memory specialist Innovative Silicon". DigiTimes. (Subscription required (help)). 
  3. ^ Clarke, Peter (2006-12-04). "Innovative Silicon revamps SOI memory, AMD likes it". EE Times. Retrieved 2015-06-29. 
  4. ^ "GlobalFoundries Outlines 22 nm Roadmap". Chinese Academy of Sciences. 2010-01-08. Retrieved 2015-06-29. 
  5. ^ Yam, Marcus (2007-08-13). "Hynix Licenses ISi Z-RAM Technology for Future DRAM Chips". DailyTech. Retrieved 2015-06-29. 
  6. ^ Clarke, Peter (2011-05-13). "Micron gains as floating-body memory firm closes". EE Times. Retrieved 2015-06-29. 

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