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MCP-1600

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Western Digital MCP-1600
MCP-1600 microprocessor with WD16 microcode in five 40-pin packages.
General information
Launched1975; 49 years ago (1975)
Common manufacturer
Performance
Max. CPU clock rateto 3.3 MHz
Data width8 (microdata), 18 (microcode)
Address width11 (microcode)
Architecture and classification
Instructions98
Physical specifications
Package
  • 4 or 5 x 40-pin DIP
History
Successornone
MCP-1600 registers
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 (bit position)
Register file
LSI-11 use[1]
R3 R2 PSW
R5 R4 Desination
R7 R6 Source
R9 R8 Bus address
RB RA Instruction register
RD/GD RC/GC R7 (PC)
RF/GF RE/GE R6 (SP)
GB GA R5
G9 G8 R4
G7 G6 R3
G5 G4 R2
G3 G2 R1
G1 G0 R0
Control registers
  G Register Pointer
  LC Location Counter
  RR Return Register
TR1 TR0 Translation Register
Status register
  NB ZB C4 C8 N Z V C ALU status/Flags

The MCP-1600 is a multi-chip 16-bit microprocessor introduced by Western Digital in 1975 and produced through the early 1980s.[2][3] Used in the Pascal MicroEngine, the WD16 processor in the Alpha Microsystems AM-100, and the DEC LSI-11 microcomputer, a cost-reduced and compact implementation of the DEC PDP-11.

Description

There are three types of chips in the chip-set:

  • CP1611 RALU - Register ALU chip
  • CP1621 CON - Control chip
  • CP1631 MICROM - Mask-programmed microcode ROM chip (512 – 22 bit words)

The chips use a 3.3MHz four phase clock and three power supply voltages (+5V, +12V, and -5V), as required by the N-channel silicon gate process then available at Western Digital. Internally the MCP-1600 was a (relatively fast) 8-bit processor that can be micro-programmed to emulate a 16-bit CPU. Up to four MICROMs are supported, but usually two or three could hold the needed microprogram for a processor. [4]

The register file consists of 26 8-bit registers. Ten may be addressed directly by the microinstruction (Rx), four may be addressed either directly or indirectly (Rx/Gx), and the remaining 12 may be addressed only indirectly (Gx). Indirect addressing is via a 3-bit G register which is usually loaded with the register field of the PDP-11 instruction.[1]

The most significant feature of the MCP-1600 is its Programmable Translation Array (PTA). The PTA serves to generate new microinstruction fetch addresses as a function of several parameters. These parameters are those which are normally considered during the decode of a macroinstruction. The PTA was designed specifically to eliminate most of the overhead of macroinstruction translation. Essentially a macroinstruction opcode is quickly translated into an address that is loaded onto the Location Counter, creating a jump to the appropriate microcode to handle the macroinstruction.[4]

John Wallace was the Project Manager and designed the 1621, Mike Briner designed the 1611, and later became a Senior VP at Silicon Storage Technology. Bill Pohlman was the design engineering manager and he later was Project Manager for the Intel 8086 processor.

In March 1976, it was announced that National Semiconductor would second-source the MCP-1600. It is unclear whether any were produced by National.[5]

A clone of the CP1611 and CP1621 was manufactured in the Soviet Union under the designation KR581IK1 and KR581IK2 (Template:Lang-ru).[6] The Soviet 581 series included other members of the MCP-1600 family as well.[7]

References

  1. ^ a b Bell, C. Gordon (1978). Computer Engineering: A DEC View of Hardware Systems Design (4th Printing ed.). Digital Equipment Corporation. ISBN 1-483207-67-6. Retrieved 29 July 2022.
  2. ^ "Western Digital adds MCP-1600 Micro". Computerworld. 26 November 1975.
  3. ^ "Western Digital 1600". AntiqueTech. Archived from the original on 3 January 2017. Retrieved 5 January 2017.
  4. ^ a b MCP-1600 Microprocessor Users Manual (PDF). Western Digital. 1975. Retrieved 28 April 2022.
  5. ^ "MCP 1600 Second Sourced" (PDF). Modern Data. 9 (3): 40. March 1976. Retrieved 7 November 2022.
  6. ^ "Soviet microprocessors, microcontrollers, FPU chips and their western analogs". CPU-world. Retrieved 2020-04-18.
  7. ^ Козак, Виктор Романович (24 May 2014). "Номенклатура интегральных микросхем — Микропроцессоры: серии 580 - 589" [Nomenclature of integrated circuits — Microprocessors: Series 580 - 589] (in Russian). Retrieved 24 March 2016.