Jump to content

Saraju Mohanty: Difference between revisions

Add links
From Wikipedia, the free encyclopedia
Browse history interactively
← Previous editNext edit →
Content deleted Content added
VisualWikitext
Teupdeg (talk | contribs)
270 edits
A sentence added at the introduction.
Teupdeg (talk | contribs)
270 edits
Line 66: Line 66:
== Awards and honors ==
== Awards and honors ==
* [[Glorious India Award - Rich and Famous NRIs of America]] in 2017 for exemplary contributions to the discipline.<ref>US-based NRI Achievers Honored With Glorious India Awards, http://www.kfvs12.com/story/35589663/us-based-nri-achievers-honored-with-glorious-india-awards, KFVS12, 5th June 2017.</ref><ref>US-based NRI Achievers Honored With Glorious India Awards, http://www.ktvn.com/story/35589663/us-based-nri-achievers-honored-with-glorious-india-awards, KTVN-TV, 5th June 2017.</ref><ref>US-based NRI Achievers Honoured With Glorious India Awards, http://www.prnewswire.co.in/news-releases/us-based-nri-achievers-honoured-with-glorious-india-awards-626909151.html, PR Newswire, 7th June 2017.</ref>
* [[Glorious India Award - Rich and Famous NRIs of America]] in 2017 for exemplary contributions to the discipline.<ref>US-based NRI Achievers Honored With Glorious India Awards, http://www.kfvs12.com/story/35589663/us-based-nri-achievers-honored-with-glorious-india-awards, KFVS12, 5th June 2017.</ref><ref>US-based NRI Achievers Honored With Glorious India Awards, http://www.ktvn.com/story/35589663/us-based-nri-achievers-honored-with-glorious-india-awards, KTVN-TV, 5th June 2017.</ref><ref>US-based NRI Achievers Honoured With Glorious India Awards, http://www.prnewswire.co.in/news-releases/us-based-nri-achievers-honoured-with-glorious-india-awards-626909151.html, PR Newswire, 7th June 2017.</ref>
* Society for Technical Communication (STC) 2017 Award of Merit for leadership contribution to the IEEE Consumer Electronics magazine.
* [[Society for Technical Communication]] (STC) 2017 Award of Merit for leadership contribution to the IEEE Consumer Electronics magazine.
* Chair of [[Technical Committee on VLSI]] (TCVLSI), [[IEEE Computer Society]] (IEEE-CS).<ref>Technical & Conferences Activities Board -- Technical Committees -- Technical Committee on VLSI, http://www.computer.org/web/tandc/tcvlsi</ref><ref>Dr. Saraju Mohanty Serves as the Chair of the Technical Committee on Very Large Scale Integration (TCVLSI), http://www.cse.unt.edu/site/node/678</ref>
* Chair of [[Technical Committee on VLSI]] (TCVLSI), [[IEEE Computer Society]] (IEEE-CS).<ref>Technical & Conferences Activities Board -- Technical Committees -- Technical Committee on VLSI, http://www.computer.org/web/tandc/tcvlsi</ref><ref>Dr. Saraju Mohanty Serves as the Chair of the Technical Committee on Very Large Scale Integration (TCVLSI), http://www.cse.unt.edu/site/node/678</ref>
* [[PROSE Awards|PROSE Award]] for best Textbook in Physical Sciences & Mathematics from the [[Association of American Publishers]] in 2016.<ref name=UNT-CENG-Feb2016-Editorial-PROSE>UNT Professor Receives Editorial Appointments, Recognition, http://engineering.unt.edu/unt-professor-receives-editorial-appointments-recognition</ref><ref>2016 PROSE Award Winners, https://proseawards.com/winners/2016-award-winners/#body</ref><ref>Saraju Mohanty wins McGraw-Hill textbook award, https://facultysuccess.unt.edu/faculty-awards/saraju-mohanty-wins-mcgraw-hill-textbook-award</ref>
* [[PROSE Awards|PROSE Award]] for best Textbook in Physical Sciences & Mathematics from the [[Association of American Publishers]] in 2016.<ref name=UNT-CENG-Feb2016-Editorial-PROSE>UNT Professor Receives Editorial Appointments, Recognition, http://engineering.unt.edu/unt-professor-receives-editorial-appointments-recognition</ref><ref>2016 PROSE Award Winners, https://proseawards.com/winners/2016-award-winners/#body</ref><ref>Saraju Mohanty wins McGraw-Hill textbook award, https://facultysuccess.unt.edu/faculty-awards/saraju-mohanty-wins-mcgraw-hill-textbook-award</ref>

Revision as of 20:37, 19 June 2017

Saraju Mohanty
Prof. Saraju Mohanty in 2012
Born
Odisha, India
NationalityUnited States
Alma materUniversity of South Florida (USF), Tampa
Indian Institute of Science (IISc), Bangalore
Orissa University of Agriculture and Technology (OUAT), Bhubaneswar
Occupation(s)Professor, author, scientist, computer engineer
Known forMixed-Signal Systems, Nanoelectronics Systems, Metamodeling, Design for X, High-level synthesis, Hardware-assisted digital watermarking
Notable workNanoelectronic Mixed-Signal System Design, McGraw-Hill, 2015, ISBN 978-0071825719
SpouseDr. Uma Choppali
HonorsGlorious India Award in 2017


PROSE Award for best textbook in Physical Sciences & Mathematics in 2016
Toulouse Scholars Award from UNT in 2016-17

President's Scout Award in 1988
Websitewww.smohanty.org

Saraju Mohanty is an American professor of the Department of Computer Science and Engineering, and the Director of the NanoSystem Design Laboratory, at the University of North Texas in Denton, Texas.[1][2] Prof. Mohanty was honored with the Glorious India Award - Rich and Famous NRIs of America in 2017 for his exemplary contributions to the discipline.[3] Professor Mohanty is a researcher in the areas of "Low-Power High-Performance Nanoelectronics Systems" and "hardware-assisted digital watermarking".[4] He has made significant research contributions to analogue electronics and mixed-signal integrated circuit computer-aided design and electronic design automation, nanoelectronic technology based high-level synthesis, and hardware-assisted digital watermarking. He has held the Chair of the IEEE Computer Society's Technical Committee on Very Large Scale Integration since September 2014.[5][6] He holds 4 US patents in the areas of his research. Professor Mohanty has published 200 papers and 3 books.[7][8][9]

Education

Saraju Mohanty started his schooling at Lodhachua, Nayagarh, Odisha. After graduating from Badagada Government High School, Bhubaneswar in 1988, Mohanty completed a 10+2 Science degree from Rajdhani College, Bhubaneswar in 1990. Whilst at high school he was a quite active and recognized member of The Bharat Scouts and Guides. He received his bachelor's degree (with Honors) in electrical engineering from the College of Engineering and Technology, Bhubaneswar, Orissa University of Agriculture and Technology, in 1995.[10][11]

In 1999 Mohanty completed a master's degree in engineering in Systems Science and Automation from the Indian Institute of Science in Bangalore, India. His master's thesis mentors were Professor K. R. Ramakrishnan[12] and Professor Mohan S. Kankanhalli[13] with whom he co-authored his first peer-reviewed paper.[14] Mohanty earned a Ph.D. in computer engineering from the University of South Florida in 2003. His Ph.D. mentor was Professor N. Ranganathan (IEEE Fellow and AAAS Fellow).[15][16][17]

Notable Scientific Contributions

Contributions to analog electronics and mixed-signal circuits

Mohanty has worked on design space exploration and optimization of nanoelectronic integrated circuits. The key feature of these design flows is the need for only two manual layout (or physical design) iterations which saves significant design effort. These ultra-fast design flows rely on accurate metamodels of the analog and mixed-signal circuit components. His research significantly advances the state-of-the art in Design for Excellence (DfX) or Design for X, such as Design for Variability (DfV) and Design for Cost (DfC).[18]

Contributions to high-level synthesis

Mohanty is a contributor to nanoscale CMOS or nanoelectronic technology based high-level synthesis (HLS) or architecture-level synthesis.[19][20][21] His nanoelectronic-based High-level synthesis techniques addresses the issue of process variations, the primary issue of nanoelectronic technology, during the high-level synthesis itself before the digital design moves to the detailed and lower levels of design abstractions, such as logic-level or transistor-level.[22]

Contributions to Digital watermarking and Digital rights management (DRM)

Mohanty has worked on the Secure Digital Camera (SDC) for real-time Digital rights management (DRM) at the source end of the multimedia content. The SDC has quite diverse applications where still image or video digital cameras are needed, such as secure Digital Video Broadcasting, secure Video Surveillance, electronic passport, and identity card processing. The secure digital camera (SDC) has been well-adopted by various researchers worldwide.[23][24][25]

Professional Leadership

Editorial Board

Conference Chairmanship

  • Steering Committee Chair, IEEE International Symposium on Nanoelectronic and Information Systems (iNIS)[34]
  • Steering Committee Vice-Chair, IEEE-CS Symposium on VLSI (ISVLSI)[35]
  • Steering Committee Vice-Chair, OITS International Conference on Information Technology (ICIT)[36]

Professional Membership

Awards and honors

Patents

  • Methodology for Nanoscale Technology based Mixed-Signal System Design, US Patent Number: 9,053,276.
  • Intelligent Metamodel Integrated Verilog-AMS for Fast and Accurate Analog Block Design Exploration, US Patent Number: 9,026,964.
  • Apparatus and Method for Transmitting Secure and/or Copyrighted Digital Video Broadcasting Data Over Internet Protocol Network, US Patent Number: 8,423,778.
  • Methods and Devices for Enrollment and Verification of Biometric Information in Identification Documents, US Patent Number: 8,058,972.

Books

  • Nanoelectronic Mixed-Signal System Design, McGraw-Hill, 2015, ISBN 978-0071825719.
  • Nano-CMOS and Post-CMOS Electronics: Devices and Modelling, The Institute of Engineering and Technology, 2016, ISBN 978-1849199971.
  • Nano-CMOS and Post-CMOS Electronics: Circuits and Design, The Institute of Engineering and Technology, 2016, ISBN 978-1849199995.
  • Robust SRAM Designs and Analysis, Springer, 2012, ISBN 978-1461408178.
  • Low-Power High-Level Synthesis for Nanoscale CMOS Circuits, Springer, 2008, ISBN 978-0387764733.

Ph.D. Dissertations Supervised

  • New Frameworks for Secure Image Communication in the Internet of Things (IoT)
  • Analysis and Optimization of Graphene FET Based Integrated Circuits
  • Geostatistical Inspired Metamodeling and Optimization of Nanoscale Analog Circuits
  • Secure and Energy Efficient Execution Frameworks Using Virtualization and Light-Weight Cryptographic Components
  • Layout-Accurate Ultra-Fast System Level Design Exploration Through Verilog-AMS
  • Metamodeling-Based Fast Optimization of Nanoscale AMS-SoCs
  • Process-Voltage-Temperature Aware Nanoscale Circuit Optimization
  • Variability Aware Low-Power Techniques for Nanoscale Mixed-Signal Circuits

References

  1. ^ The University of North Texas, Dept. of Computer Science and Engineering, NanoSystem Design Laboratory, http://nsdl.cse.unt.edu/
  2. ^ The University of North Texas, Dept. of Computer Science and Engineering, http://www.cse.unt.edu/site/node/91
  3. ^ US-based NRI Achievers Honoured With Glorious India Awards, https://www.telegraphindia.com/pressrelease/prnw/60161/us-based-nri-achievers-honoured-with-glorious-india-awards.html, The Telegraph India, 7th June 2017.
  4. ^ Research Interests, Prof. Saraju Mohanty, http://www.cse.unt.edu/~smohanty/Research.html
  5. ^ Dr. Saraju Mohanty Serves as the Chair of the Technical Committee on Very Large Scale Integration (TCVLSI), https://facultysuccess.unt.edu/dr-saraju-mohanty-serves-chair-technical-committee-very-large-scale-integration-tcvlsi
  6. ^ Technical Committee on VLSI, http://www.computer.org/portal/web/tandc/tcvlsi
  7. ^ ResearchGate - Saraju Mohanty, http://www.researchgate.net/profile/Saraju_Mohanty
  8. ^ Google Scholar List - Saraju Mohanty, https://scholar.google.com/scholar?hl=en&q=saraju+mohanty
  9. ^ DBLP - Saraju Mohanty, http://dblp.uni-trier.de/pers/hd/m/Mohanty:Saraju_P=.html
  10. ^ CET Bhubaneswar observes Annual Alumni Meet, http://www.odishanewsinsight.com/events/cet-bhubaneswar-observes-annual-alumni-meet/, December 31, 2015.
  11. ^ Unitary University Status For CET Demanded, The Pioneer, http://www.dailypioneer.com/state-editions/bhubaneswar/unitary-university-status-for-cet-demanded.html, Thursday, 31 December 2015.
  12. ^ S. P. Mohanty, "Watermarking of Digital Images", Master of Engineering in System Science and Automation Thesis, Indian Institute of Science, Bangalore, January 1999, http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.10.1673&rep=rep1&type=pdf
  13. ^ "Past Postdocs and Graduated Students". Retrieved 8 August 2016.
  14. ^ S. P. Mohanty, K. R. Ramakrishnan, and M. S. Kanakanhalli, "A Dual Watermarking Technique for Images", in Proceedings of the 7th ACM International Multimedia Conference (ACMMM) (Vol. 2), pp.49-51, 1999.
  15. ^ S. P. Mohanty, "Energy and Transient Power Minimization During Behavioral Synthesis", Ph.D. Dissertation, Department of Computer Science and Engineering, University of South Florida, 2003, http://etd.fcla.edu/SF/SFE0000129/SarajuDissertationFinal.pdf
  16. ^ Computer Science Tree, N. Ranganathan, University of South Florida, http://academictree.org/computerscience/tree.php?pid=416222
  17. ^ Nagarajan “Ranga” Ranganathan, Department of Computer Science and Engineering, University of South Florida, Tampa, FL 33620,http://www.usf.edu/engineering/cse/documents/ranganathan-cv.pdf
  18. ^ DFX for Nanoelectronic Embedded Systems, Keynote Address at First IEEE Sponsored International Conference on Control, Automation, Robotics and Embedded System, CARE-2013, http://care.iiitdmj.ac.in/Keynote_Speakers.html.
  19. ^ Saraju Mohanty and Elias Kougianos, "Simultaneous Power Fluctuation and Average Power Minimization during Nano-CMOS Behavioral Synthesis", in Proceedings of the 20th International Conference on VLSI Design, pp. 577-582, 2007.
  20. ^ Mohanty, S. P.; Gomathisankaran, M.; Kougianos, E. (2014). "Variability-Aware Architecture Level Optimization Techniques for Robust Nanoscale Chip Design". Elsevier Computers and Electrical Engineering Journal. 40 (1): 168–193. doi:10.1016/j.compeleceng.2013.11.026.
  21. ^ Chen, Y.; Wang, Y.; Takach, A.; Xie, Y. "Parametric Yield Driven Resource Binding in High-Level Synthesis with Multi-Vth Vdd Library and Device Sizing". Journal of Electrical and Computer Engineering. 2012: 105250.
  22. ^ "Unified Challenges in Nano-CMOS High-Level Synthesis", Invited Talk, 22nd IEEE International Conference on VLSI Design, 2009.
  23. ^ Thomas Winkler, Adam Erdelyi, and Bernhard Rinner, "TrustEYE M4: Protecting the Sensor--not the Camera", in Proceedings of the International Conference on Advanced Video and Signal Based Surveillance, 2014.
  24. ^ S. D. Roy, X. Li, Y. Shoshan, A. Fish, and O. Yadid-Pecht, "Hardware Implementation of a Digital Watermarking System for Video Authentication". IEEE Transactions on Circuits and Systems for Video Technology. 23 (2), 2013, pp. 289–301.
  25. ^ C. -T. Yen, T. Wu, M. -H. Guo, C. -K. Yang, and H. -C. Chao, "Digital product transaction mechanism for electronic auction environment". IET Information Security. 4 (4), 2010, pp. 248–257.
  26. ^ a b UNT Professor Receives Editorial Appointments, Recognition, http://engineering.unt.edu/unt-professor-receives-editorial-appointments-recognition
  27. ^ IEEE Consumer Electronics Magazine Editorial Board, http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7450780
  28. ^ IEEE Consumer Electronics Magazine, http://ieeexplore.ieee.org/xpl/aboutJournal.jsp?punumber=5962380
  29. ^ IEEE Consumer Electronics Magazine, http://cesoc.ieee.org/publications/ce-magazine.html
  30. ^ VLSI Circuits and Systems Letter (VCAL) -- Editorial Board, https://www.computer.org/web/tcvlsi/editorial-board
  31. ^ IEEE TCAD Editorial Board, http://ieee-ceda.org/publications/tcad/editorial-board
  32. ^ ACM JETC Editorial Board, http://jetc.acm.org/editorial_board.cfm
  33. ^ IET CDS Editorial Board, http://digital-library.theiet.org/journals/iet-cds/editorial-board
  34. ^ IEEE International Symposium on Nanoelectronic and Information Systems (iNIS), http://www.ieee-inis.org/
  35. ^ IEEE-CS Symposium on VLSI (ISVLSI), http://www.isvlsi.org/
  36. ^ International Conference on Information Technology (ICIT), http://www.oits-icit.org/
  37. ^ Saraju P. Mohanty, ACM Senior Member, United States – 2010, http://awards.acm.org/award_winners/mohanty_2241263.cfm
  38. ^ Chair TCVLSI Bio, https://www.computer.org/cms/technical-activities/Technical-Committees/Elections/tcvlsi/2016/mohanty-2016-tcvlsi-biosketch-and-position-statement.pdf
  39. ^ Peter Corcoran, Welcome to Our Incoming Editor-in-Chief, CE Magazine Editorial, http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7539241
  40. ^ US-based NRI Achievers Honored With Glorious India Awards, http://www.kfvs12.com/story/35589663/us-based-nri-achievers-honored-with-glorious-india-awards, KFVS12, 5th June 2017.
  41. ^ US-based NRI Achievers Honored With Glorious India Awards, http://www.ktvn.com/story/35589663/us-based-nri-achievers-honored-with-glorious-india-awards, KTVN-TV, 5th June 2017.
  42. ^ US-based NRI Achievers Honoured With Glorious India Awards, http://www.prnewswire.co.in/news-releases/us-based-nri-achievers-honoured-with-glorious-india-awards-626909151.html, PR Newswire, 7th June 2017.
  43. ^ Technical & Conferences Activities Board -- Technical Committees -- Technical Committee on VLSI, http://www.computer.org/web/tandc/tcvlsi
  44. ^ Dr. Saraju Mohanty Serves as the Chair of the Technical Committee on Very Large Scale Integration (TCVLSI), http://www.cse.unt.edu/site/node/678
  45. ^ 2016 PROSE Award Winners, https://proseawards.com/winners/2016-award-winners/#body
  46. ^ Saraju Mohanty wins McGraw-Hill textbook award, https://facultysuccess.unt.edu/faculty-awards/saraju-mohanty-wins-mcgraw-hill-textbook-award
  47. ^ Engineering Professor Receives Awards, http://engineering.unt.edu/engineering-professor-receives-awards
  48. ^ Salute to Faculty Excellence 2016 Winners, http://facultysuccess.unt.edu/salute-faculty-excellence-2016-winners-0
  49. ^ ISVLSI 2015, http://www.eng.ucy.ac.cy/theocharides/isvlsi15/
Retrieved from "https://en.wikipedia.org/w/index.php?title=Saraju_Mohanty&oldid=786494071"