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Talk:List of MIPS architecture processors

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This is the current revision of this page, as edited by Qwerfjkl (bot) (talk | contribs) at 08:45, 28 January 2024 (Implementing WP:PIQA (Task 26)). The present address (URL) is a permanent link to this version.

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Hope this helps:

[    0.000000] Linux version 2.6.30-V1.04.15 (joe@ubuntu-BLDSR2) (gcc version 4.2.3) #1 SMP Tue Oct 31 16:18:33 CST 2017
[    0.000000] console [early0] enabled
[    0.000000] CPU revision is: 00025a11 (Broadcom BMIPS5000)
[    0.000000] FPU revision is: 00130001
[    0.000000] Added NON Linux Memory Region 08000000 - 10000000 ubus 00000000
[    0.000000] Added Linux Memory Region 00000000 - 08000000 ubus 08000000
[    0.000000] ddr_mem_size: 10000000
[    0.000000] Determined physical RAM map:
[    0.000000]  memory: 08000000 @ 08000000 (reserved)
[    0.000000]  memory: 08000000 @ 00000000 (usable)
[    0.000000] Zone PFN ranges:
[    0.000000]   DMA      0x00000000 -> 0x00001000
[    0.000000]   Normal   0x00001000 -> 0x00008000
[    0.000000]   HighMem  0x00008000 -> 0x00008000
[    0.000000] Movable zone start PFN for each node
[    0.000000] early_node_map[1] active PFN ranges
[    0.000000]     0: 0x00000000 -> 0x00010000
[    0.000000] Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32512
[    0.000000] Kernel command line: root=/dev/mtdblock2 ro noinitrd rootfstype=squashfs console=null,115200 noapp 
[    0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 64 bytes.
[    0.000000] Primary data cache 32kB, 4-way, VIPT, cache aliases, linesize 32 bytes
[    0.000000] MIPS secondary cache 256kB, 8-way, linesize 128 bytes.
[    0.000000] RCU-based detection of stalled CPUs is enabled.
[    0.000000] NR_IRQS:256
[    0.000000] Broadcom CHIP ID: 38430038
[    0.000000] PID hash table entries: 512 (order: 9, 2048 bytes)
[    0.000000] Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
[    0.001000] Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
[    0.007000] Memory: 123748k/131072k available (4457k kernel code, 7136k reserved, 1141k data, 128k init, 0k highmem)
[    0.008000] Calibrating delay loop... 667.64 BogoMIPS (lpj=333824)
[    0.031000] Mount-cache hash table entries: 512
[    0.033000] SMP: Booting CPU1...
[    0.034000] CPU revision is: 00025a11 (Broadcom BMIPS5000)
[    0.034000] FPU revision is: 00130001
[    0.034000] Primary instruction cache 32kB, VIPT, 4-way, linesize 64 bytes.
[    0.034000] Primary data cache 32kB, 4-way, VIPT, cache aliases, linesize 32 bytes
[    0.034000] MIPS secondary cache 256kB, 8-way, linesize 128 bytes.
[    0.034000] Calibrating delay loop... 502.78 BogoMIPS (lpj=251392)
[    0.052000] SMP: CPU1 is running
[    0.052000] cpu_idle CPU 1
[    0.052000] Brought up 2 CPUs
[    0.053000] cpu_idle CPU 0
[    0.059000] net_namespace: 976 bytes
[    0.060000] NET: Registered protocol family 16
[    0.061000] Added platform devs for chip ID = 0x38430038!
[    0.069000] bio: create slab <bio-0> at 0
[    0.071000] SCSI subsystem initialized  — Preceding unsigned comment added by 103.217.167.214 (talk) 07:12, 31 March 2019 (UTC)[reply]