Talk:Parallel ATA

what are the future enhancements of ATA

what is 40/80 physical connection?

Here and elsewhere I see

"The 80-wire cable provides one ground wire to each signal wire.... Though the number of wires doubled, the number of connector pins remains the same as on 40-conductor cables. The physical connectors are identical between the two cable types."

But nowhere does anyone explain how that works. Isn't anyone besides me curious? I've spent about an hour googling for a description of the 40-pin connector that magically connects very other wire in an 80-wire cable to ground. I *have* one of thesein my hand, and I may go crazy and just take it apart, thus wasting $2.50....

-- jgo / owen_bda4@yahoo.com

The purpose of an 80 wire cable is to reduce capacitive coupling, a phenomenon that occurs between wires that carry signals at high frequencies. Putting a ground wire between data wires couples the data wires to ground instead of to another data wire, reducing interference in the data carrying wires.

It would seem necessary to have an 80 pin connector for 80 wires, however, there only needs to be one ground connector pin at most, although there are several shown in the diagram, and all of the ground wires share the ground connection, (they are connected in some way inside of the connector). (unsigned comment, i cba to dig through the page history to find out whoose)

afaict its a special connector made specifically to do this extra grounding, not any kind of standard part from the electronics industry. When you standard is as widely used as ATA is you can afford to specify custom connectors to provide backwards compatibility whilst allowing a better wiring type. Plugwash 00:04, 30 September 2005 (UTC)[reply]

cleaned up the description of the 80-wire cable and the connector. Jeh 22:25, 8 October 2005 (UTC)[reply]

Parallel ATA Interface

The second paragraph needs to be rewritten or at least copyedited. The necessary changes are above my command of the english language. The problem is in the redundancy of electromagnetic induction and crosstalk (the latter is caused by the former).--Deelkar (talk) 02:13, 18 May 2005 (UTC)[reply]

Done. The actual issue here is capacitive coupling, since that is more of a problem at higher freqs, just the opposite of inductive coupling. Jeh 22:33, 8 October 2005 (UTC)[reply]

"Parallel ATA cables transfer data 16 or 32 bits at a time."

How can you do 32 bit transfers with only 16 data pins? Maybe the 32 bits are transfered between ATA controller and CPU/DMA controller, but i doubt you can do this on the ATA bus.

You can't. Fixed. Jeh 22:33, 8 October 2005 (UTC)[reply]

master/slave terminology

In a comment imbedded in the article page, Plugwash asked:

Is it fair to say that the idea of master/slave probablly originated from the way the master is generally the boot drive and the slave is then acting as a slave to whatever the code loaded from the master decides to do ?

My response (I'm the guy who put in the "they aren't really called 'master' and 'slave'" paragraph):

That seems like quite a stretch to me. There is another hint of an origin back in the ATA-1 spec in the description of the SPSYNC (Spindle sync) interface signal (section 6.3.16). But even there, both devices could be "slaves" to a sync signal from the host controller! SPSYNC was relegated to simply "defined by the vendor" status in ATA-2 and dropped completely in ATA-3. It shared the same pin on the 40-pin connector with CSEL (cable select) and so when CSEL became more strongly recommended, SPSYNC had to go. And... shouldn't this sort of thing be in the talk page? Jeh 06:44, 2 October 2005 (UTC)[reply]

Master and slave have less to do with the OS's conception of logical devices as they do with the AT BIOS and the origins of ATA itself. ATA's register set is based directly on the old Western Digital 1003 ST-506 controller board used in the AT (and cloned by just about everyone back in the pre-ATA days), and the 1003 could either have one drive as Drive 0, or two drives as Drive 0 and Drive 1 -- you couldn't have a single drive as Drive 1, because the BIOS wouldn't boot from it (and I think IBM's own BIOS would complain about it, actually). On ATA, this setup is emulated by the drives listening to the bus (all commands are available to both drives) and seeing what the DEV bit in the Device/Head register is set to, then only interpreting commands that it expects to see based on its jumper settings. This used to be undefined behavior in a single-drive-set-to-Slave system, but later versions of ATA let you run a drive jumpered as Slave or Drive 1 by itself, with some restrictions. Also, if the drives can't agree on who has control of the bus, you've got problems, and this was a big issue back in the early days (when there were various methods of deciding if there was a slave present).

Also, SPSYNC was an artifact of the days when drives didn't have a lot of on-board cache, and synchronising the spindles actually made a difference with access times; when drives started having caches capable of holding hundreds of sectors at a time (even a 512k cache, common in the late 1990s but puny by 2005 standards, can hold 1024 512-byte sectors...), this became a lot less important, and people stopped using it. -lee 16:08, 22 November 2005 (UTC)[reply]

is cable select mandatory

in the standard for the 80 wire cables, they certainly all seem to have it in practice. Plugwash 13:09, 9 October 2005 (UTC)[reply]

I'm not sure. I think so... but the wording is a little vague. Jeh 20:08, 9 October 2005 (UTC)[reply]

What's the meaning of Ultra DMA/100, /133, etc...

The article should mention what is the meaning of "Ultra DMA/100", "Ultra DMA/133", etc. I have always assumed the number was the maximum burst throughput in megabytes per second, but I've had a surprisingly difficult time looking for the answer to this.

While discussing the throughput rate, it would also be good to mention whether the /100 or /133 (etc) burst rate makes any real-world difference, typically, with a reference to typical sustained throughput rates of today's ATA hard disks. Tempshill 19:39, 10 October 2005 (UTC)[reply]

Good point. "Ultra DMA/100", etc., are unofficial names. Yes, the number is the max transfer rate on the bus in MB/sec. They're commonly used on drive boxes because it's far easier to remember that "Ultra DMA/100 means 100 MB/sec" than it is to remember that for the official name of "Ultra DMA 4." And yes, these make little difference for today's (or even tomorrow's) hard drives.

The short paragraph immediately above the "modes" table mentions this a bit. I've been thinking that that should go UNDER the "Modes" table, or at least under the heading where the table is, and that is a good place to amplify these points too. Jeh 23:45, 10 October 2005 (UTC)[reply]

... ok, done. What does anyone think? Did I get too far into opinion in dismissing STR results as not important? If you think so, you know where the "edit" button is. ;) Jeh 00:35, 11 October 2005 (UTC)[reply]

Not at all; this type of analysis is what is needed in technical Wikipedia articles. I thought the sentence "In addition, as of October 2005 no ATA hard drives exist capable of measured sustained transfer rates of above 80 MB/s, let alone higher" formed an excellent grounding for that whole discussion. Thanks! Tempshill 05:38, 13 October 2005 (UTC)[reply]

Three devices on a cable?

The page says

One occasionally finds cables that allow for the connection of three ATA devices onto one IDE channel, but in this case one drive remains read-only (this type of configuration virtually never occurs).

and then someone added this comment: how is that done then?

I'd like to know that too. It seems to me that I may have seen (how's that for indefinite?) configurations like this involving some of those cheap ratty little tape drives sold for PCs. But I don't really believe it; I think I'm thinking of similar kluges on floppy cables, which I know did exist.

Whatever, such a configuration is absolutely not supported or allowed by the ATA specs.

My first impulse is to delete this reference completely, as in "no, it didn't ever happen." But I certainly haven't seen even a tiny fraction of all the nonstandard (or even all the standard) things that have been attached to PCs over the years. So... does anyone have anything more definite than a vague memory of how this worked? Since there's only one bit for "device address" in the ATA command structure I am not at all certain how this could have worked, but of course if someone has seen it working, that blows all theoretical arm-waving out of the water... Jeh 23:33, 10 October 2005 (UTC)[reply]

It could work, theoretically, by commandeering one of the unused bits in the Device/Head register, but the other drives would have to know about what you did for it to work right. This works better on floppy setups because the floppy bus has 4 device select lines. -lee 16:11, 22 November 2005 (UTC)[reply]

How does the controller indicate what drive it wants active anyway? Plugwash 23:40, 19 March 2006 (UTC)[reply]

An ATA controller works by writing binary-coded commands into registers implemented on each device. One of these is called the Device register; each device has one (and several others). Unlike in older interfaces like ST-506, there are no "device select" lines in the cable. There are bits (the CS, chip select, and DA, device address) in the wires that indicate which register is being addressed, but whatever is sent is actually written into the selected registers of both devices on the cable. The devices figure out which commands to pay attention to and which to ignore by looking at the DEV bit in the Device register. When reading from device registers, only the device whose logical address ("device 0" or "device 1") matches this bit responds. Since there is only one bit there is no obvious way to support more than two devices! Jeh 03:16, 2 August 2006 (UTC)[reply]

"Maximum disk size" values wrong

For all I know, the total number of addressable sectors was 2**28 (28 bit) from ATA-1 onwards, in both CHS and LBA mode. Which means 2**28 * 512 Byte = 128 GiB maximum disk size for all ATA specs prior to the introduction of the 48-bit extensions in ATA-6.

Quoted from the ATA-1 spec (http://www.t13.org/project/d0791r4c-ATA-1.pdf):

7.2.3 Cylinder high register
This register contains the high order bits of the starting cylinder address
for any disk access. [...]
In LBA Mode this register contains Bits 16-23. At the end of the command,
this register is updated to reflect the current LBA Bits 16-23.
NOTE 4 - Prior to the introduction of this standard, only the lower 2 bits of
this register were valid, limiting cylinder address to 10 bits i.e., 1024
cylinders.
7.2.4 Cylinder low register
This register contains the low order 8 bits of the starting cylinder address
for any disk access. At the end of the command, this register is updated to
reflect the current cylinder number.
In LBA Mode this register contains Bits 8-15. At the end of the command, this
register is updated to reflect the current LBA Bits 8-15.
[...]
7.2.8 Drive/head register
[...]
- If L=0, HS3 through HS0 contain the binary coded address of the head to
be selected e.g., if HS3 through HS0 are 0011b, respectively, head 3
will be selected. HS3 is the most significant bit. At command
completion, these bits are updated to reflect the currently selected
head.
- If L=1, HS3 through HS0 contain bits 24-27 of the LBA. At command
completion, these bits are updated to reflect the current LBA bits
24-27.
[...]
7.2.12 Sector number register
This register contains the starting sector number for any disk data access for
the subsequent command. The sector number may be from 1 to the maximum number
of sectors per track.
In LBA Mode this register contains Bits 0-7.

There you have it. 16+4+8=28 bits for the sector addressing, meaning 128 GiB addressable space, in both CHS and LBA mode, from ATA-1 onwards. *prior to ATA-1*, there were only 10 bits for the cylinder number, giving 10+4+8=22 bits for the sector addressing and 2 GiB addressable space.

The "maximum disk size" values in the article appear to be limitations mandated by various MS-DOS and/or BIOS routines (or weird combinations of both) that were in use at one time or another. There were no such limits in the underlying ATA controllers.

Unless I'm missing something obvious here, the text should be updated. Multi io 01:29, 21 May 2006 (UTC)[reply]

I just removed

ATA devices have suffered from a number of "barriers" in terms of how much data they can handle. However, new addressing systems and programming techniques have broken most of these barriers. Some of the ATA-specific barriers included: 504 MiB, ~8 GiB, ~32 GiB, and 128 GiB. A variety of other barriers have existed, usually due to device drivers and disk I/O layers in operating systems that did not correspond with ATA standards.

The paragraph below says the same thing in much better terms clearly attributing it to the PC BIOS. We still need some info on the 32 gig limit though. Plugwash 01:31, 21 May 2006 (UTC)[reply]

Oh -- yes, that paragraph seems accurate. I was referring to the table in "ATA standards, versions, ...". I've corrected that one now -- 28-bit addressing from ATA-1 onwards, as the spec and the paragraph says. Right? Multi io 02:29, 21 May 2006 (UTC)[reply]

Size limits

There's an excellent resource which provides detailed explanations of why and when a certain size limit was introduced. http://www.pcguide.com/ref/hdd/bios/size.htm --Dmitry _{(talk •contibs )} 08:11, 7 August 2006 (UTC)[reply]

ATAPI 8

what is new in ATAPI 8 ?

Updated from draft. --Dmitry _{(talk •contibs )} 08:10, 7 August 2006 (UTC)[reply]

missing pin

I have a drive where Pin 1 has broken off. Now the drive otherwise works fine, and I want to know what side effects I should expect from no reset pin being present, and if I should toss the drive or get it repaired. Stormscape 05:03, 9 April 2006 (UTC)[reply]

2.5-inch drives?

The 44-pin interface on 2.5-inch drives - is that ATA also? If so, what are the extra 4 pins? - Brian Kendig 23:58, 7 June 2006 (UTC)[reply]

Yes, it's ATA. And you can get adapters (e.g. "laptop drive adapter") to use a 2.5-inch drive on a standard 40-pin ATA connector, or vice versa (in theory, I haven't seen one in that direction). The extra pins are for +5Vdc power and ground. Jeh 21:28, 3 July 2006 (UTC)[reply]

Missing in article

What is otherwise a quite decent article is missing any and all reference to the transfer rates of ATA devices when more than one device is connected on a data cable / port...

Will the transfer rate revert to the slowest device?
Will it revert per above only when the slower device is accessed?
Will that hold true for both, M/S & CS settings?
Will that hold true when data cable is 80-wire?

etc...

Excellent point. Does the article answer your questions now? It's a complex issue, not limited to just the actual transfer speeds. Jeh 03:03, 2 August 2006 (UTC)[reply]

IDE != ATA?

The article frequently suggests that IDE was an early name given to ATA, but if ATA really does stand for "AT attachment", then this can't be the case. IDE comes in two forms, a version that implements the 16 bit AT ISA bus, and an eight bit version supporting the XT bus. (I've seen this referred to as XTIDE)

I only know this because the Amiga A590 SCSI controller contained a little used implementation of the eight bit version of IDE in addition to the built-in SCSI2 interface.

IDE redirects to this page, so the distinction probably should be made clear. —The preceding unsigned comment was added by 208.152.231.254 (talk • contribs) 00:19, 10 August 2006 (UTC)

IDE stands for "Integrated drive electronics", a non-standardized market name for any hard drive with built-in controller directly attached to the bus, and such drives existed many years before the official draft of ATA standard was introduced - they just used proprietary standards submitted by manufacturers, mostly Western Digital. The name reflects the fact that 16-bit AT bus attachment was the most popular choice of hard drive manufacturers until the rise of VESA Local Bus and PCI . --Dmitry _{(talk •contibs )} 10:33, 11 August 2006 (UTC)[reply]

inconsistancy about int 13h extentions

the BIOS interrupt call article shows extended int13 as having 64 bits for offset and no indication of the size of the offset, the INT 13 article states "The original version of this interface supports 32-bit LBAs. Newer versions support 48-bit and 64-bit LBAs. These allow addressing of 2 TiB, 128 PiB, and 8 ZiB respectively.". Which is correct and if its the INT 13 article that is correct what are the real packet structure? Plugwash 10:45, 10 August 2006 (UTC)[reply]

It seems like the data packet allowed for 64-bit LBA right from the start (at least as of version 1.1 of Enhanced Disk Drive spec), but it later was altered to allow a 48-bit LBA in Enhanced Disk Drive version 2 (2004). The data structures still accept 64-bit number.--Dmitry _{(talk •contibs )} 10:23, 11 August 2006 (UTC)[reply]

EIDE=ATAPI?

I'd heard that IDE=ATA, and EIDE=ATAPI. Both are mentioned as being extensions for larger disk support; are they indeed synonymous terms? 70.228.77.77 03:49, 18 August 2006 (UTC)[reply]

See the section above, IDE != ATA. --Dmitry _{(talk •contibs )} 07:30, 18 August 2006 (UTC)[reply]

HPA/DCO

It might be nice to see at least some mention of the HPA and DCO features added in later ATA revisions. -- TDM 13:58, 20 August 2006 (UTC)[reply]