View source for DisplayPort

{{Short description|Digital display interface}}
{{Use dmy dates|date=October 2020}}
{{Technical|date=March 2024|talk=Technical nature of the article}}
{{Infobox connector
| name = DisplayPort
| type = Digital audio/video connector
| logo = [[File:DisplayPort.svg|frameless]]
| image = 
| caption = 
| designer = [[Video Electronics Standards Association|VESA]]
| design_date = {{start date and age|2006|05}}
| manufacturer = Various
| production_date = 2008–present
| superseded = [[Digital Visual Interface|DVI]], [[VGA connector|VGA]], [[SCART]], [[Component video|RGB Component]]
| superseded_by = None
| superseded_by_date = 
| external = Yes
| hotplug = Yes
| length = Various
| width = 
| height = 
| audio_signal = Optional; 1{{ndash}}8 channels, 16 or 24-bit [[linear PCM]]; 32–192{{nbsp}}kHz sampling rate; maximum bitrate 36,864{{nbsp}}kbit/s (4,608{{nbsp}}kB/s)
| video_signal = Optional, maximum resolution limited by available bandwidth
| data_signal = Yes
| data_bit_width = 
| data_bandwidth = 1.62, 2.7, 5.4, 8.1, 10, 13.5, or 20{{nbsp}}Gbit/s data rate per lane; 1, 2, or 4 lanes; (effective total 5.184, 8.64, 17.28, 25.92, 38.69, 52.22, or 77.37{{nbsp}}Gbit/s for 4-lane link); 2 or 720{{nbsp}}Mbit/s (effectively 1 or 576{{nbsp}}Mbit/s) for the auxiliary channel.
| data_devices = 
| data_style = Micro-packet
| physical_connector = 
| num_pins = 20 pins for external connectors on desktops, notebooks, graphics cards, monitors, etc. and 30/20 pins for internal connections between graphics engines and built-in flat panels.
| pinout_image = [[File:DisplayPort Connector.svg|center|300px]]
| pinout_caption = External connector (source-side) on [[Printed circuit board|PCB]]
| pin1 = Lane 0 (+)
| pin1_name = ML_Lane{{nbsp}}0{{nbsp}}(p){{efn|name=laneorder|This is the pinout for source-side connector, the sink-side connector pinout will have lanes 0{{ndash}}3 reversed in order; i.e., lane 3 will be on pin 1(n) and 3(p) while lane 0 will be on pin 10(n) and 12(p).}}
| pin2 = Ground
| pin2_name = GND
| pin3 = Lane 0 (−)
| pin3_name = ML_Lane{{nbsp}}0{{nbsp}}(n){{efn|name=laneorder}}
| pin4 = Lane 1 (+)
| pin4_name = ML_Lane{{nbsp}}1{{nbsp}}(p){{efn|name=laneorder}}
| pin5 = Ground
| pin5_name = GND
| pin6 = Lane 1 (−)
| pin6_name = ML_Lane{{nbsp}}1{{nbsp}}(n){{efn|name=laneorder}}
| pin7 = Lane 2 (+)
| pin7_name = ML_Lane{{nbsp}}2{{nbsp}}(p){{efn|name=laneorder}}
| pin8 = Ground
| pin8_name = GND
| pin9 = Lane 2 (−)
| pin9_name = ML_Lane{{nbsp}}2{{nbsp}}(n){{efn|name=laneorder}}
| pin10 = Lane 3 (+)
| pin10_name = ML_Lane{{nbsp}}3{{nbsp}}(p){{efn|name=laneorder}}
| pin11 = Ground
| pin11_name = GND
| pin12 = Lane 3 (−)
| pin12_name = ML_Lane{{nbsp}}3{{nbsp}}(n){{efn|name=laneorder}}
| pin13 = Connected to ground{{efn|name=pulldown|Pins 13 and 14 may either be directly connected to ground or connected to ground through a pulldown device.}}
| pin13_name = CONFIG1
| pin14 = Connected to ground{{efn|name=pulldown}}
| pin14_name = CONFIG2
| pin15 = Auxiliary channel (+)
| pin15_name = AUX{{nbsp}}CH{{nbsp}}(p)
| pin16 = Ground
| pin16_name = GND
| pin17 = Auxiliary channel (−)
| pin17_name = AUX{{nbsp}}CH{{nbsp}}(n)
| pin18 = Hot plug detect
| pin18_name = Hot{{nbsp}}plug
| pin19 = Return for power
| pin19_name = Return
| pin20 = Power for connector (3.3{{nbsp}}V 500{{nbsp}}mA)
| pin20_name = DP_PWR
| pinout_notes = {{noteslist}}
}}
[[File:Displayport-cable.jpg|thumb|upright=1.4|DisplayPort connector]]
[[File:RJ-45 Ethernet socket on Lenovo T410 Laptop.jpg|thumb|A DisplayPort port (top right) on a [[laptop]] from 2010, near an [[Ethernet port]] (center) and a [[USB]] port (bottom right)]]

'''DisplayPort''' ('''DP''') is a proprietary{{efn|Only the DisplayPort specification versions 1.0 and 1.1a do not require signing a non-disclosure agreement with [[VESA]].}} [[digital display interface]] developed by a consortium of PC and chip manufacturers and standardized by the [[Video Electronics Standards Association]] (VESA). It is primarily used to connect a video source to a [[display device]] such as a [[computer monitor]]. It can also carry [[audio signal|audio]], [[USB]], and other forms of data.<ref name="ICCE">{{cite web |url=http://www.vesa.org/wp-content/uploads/2011/01/ICCE-Presentation-on-VESA-DisplayPort.pdf |title=DisplayPort Technical Overview |date=10 January 2011 |website=VESA.org |access-date=23 January 2012}}</ref>

DisplayPort was designed to replace [[VGA connector|VGA]], [[FPD-Link]], and [[Digital Visual Interface]] (DVI). It is [[backward compatibility|backward compatible]] with other interfaces, such as DVI and [[High-Definition Multimedia Interface]] (HDMI), through the use of either active or passive adapters.<ref>{{cite web |url= http://news.hopeindustrial.com/2011/transition-to-displayport-connectors |title= DisplayPort... the End of an Era, but Beginning of a New Age |date=27 April 2011 |publisher=Hope Industrial Systems |access-date=9 March 2012}}</ref>

It is the first display interface to rely on packetized [[data transmission]], a form of digital communication found in technologies such as [[Ethernet]], USB, and [[PCI Express]]. It permits the use of internal and external display connections. Unlike legacy standards that transmit a [[clock signal]] with each output, its protocol is based on small [[data packet]]s known as ''micro packets'', which can embed the clock signal in the data stream, allowing higher resolution using fewer pins.<ref>{{cite web |url= http://www.tomshardware.com/reviews/amd-ati-eyefinity,2567-6.html |title=AMD's Eyefinity Technology Explained |date= 28 February 2010 |publisher= Tom's Hardware |access-date= 23 January 2012}}</ref> The use of data packets also makes it extensible, meaning more features can be added over time without significant changes to the physical interface.<ref name="extremetech">{{cite web |url=http://www.extremetech.com/computing/84094-an-inside-look-at-displayport-v12 |title= An Inside Look at DisplayPort v1.2 |date=4 February 2011 |publisher=ExtremeTech |access-date=28 July 2011}}</ref>

DisplayPort is able to transmit audio and video simultaneously, although each can be transmitted without the other. The video signal path can range from six to sixteen bits per [[channel (digital image)|color channel]], and the audio path can have up to eight channels of 24-bit, 192{{nbsp}}kHz uncompressed [[Pulse-code modulation|PCM]] audio.<ref name="ICCE" /> A bidirectional, half-duplex auxiliary channel carries device management and device control data for the Main Link, such as VESA [[Extended display identification data|EDID]], [[Monitor Control Command Set|MCCS]], and [[VESA Display Power Management Signaling|DPMS]] standards. The interface is also capable of carrying bidirectional USB signals.<ref name="tomshardware">{{cite web |url= http://www.tomshardware.com/reviews/amd-eyefinity-6-displayport,2596-5.html |title= The Case For DisplayPort, Continued, And Bezels |date =15 April 2010 |publisher=Tom's Hardware |access-date=28 July 2011}}</ref>

The interface uses a [[Differential signalling|differential]] signal that is not compatible with DVI or HDMI. However, [[#DisplayPort Dual-Mode (DP++)|dual-mode]] DisplayPort ports are designed to transmit a [[Digital Visual Interface#Single-link DVI|single-link]] DVI or HDMI protocol ([[TMDS]]) across the interface through the use of an external ''passive'' adapter, enabling compatibility mode and converting the signal from 3.3 to 5 volts. For analog [[VGA]]/[[YPbPr]] and [[dual-link DVI]], a powered ''active'' adapter is required for compatibility and does not rely on dual mode. Active VGA adapters are powered directly by the DisplayPort connector, while active dual-link DVI adapters typically rely on an external power source such as USB.

== Versions ==

=== 1.0 to 1.1 ===
The first version, 1.0, was approved by VESA on 3 May 2006.<ref name="launch">{{cite web |title=New DisplayPort(TM) Interface Standard for PCs, Monitors, TV Displays and Projectors Released by the Video Electronics Standards Association |date=3 May 2006 |publisher=Video Electronics Standards Association (VESA) |archive-url=https://web.archive.org/web/20090214160316/http://www.vesa.org/press/VESA_dportlaunchpr_Final.htm |url=http://www.vesa.org/press/VESA_dportlaunchpr_Final.htm |archive-date=14 February 2009}}</ref> Version 1.1 was ratified on 2 April 2007,<ref>{{cite web |url=http://www.geek.com/articles/gadgets/displayport-the-new-video-interconnect-standard-20070730/ |title=DisplayPort: The new video interconnect standard |last=Hodgin |first=Rick |date=30 July 2007 |publisher=geek.com |access-date=21 July 2011 |archive-date=16 October 2012 |archive-url=https://web.archive.org/web/20121016143458/http://www.geek.com/articles/gadgets/displayport-the-new-video-interconnect-standard-20070730/ |url-status=dead }}</ref> and version 1.1a on 11 January 2008.<ref name="DP 1.1a">{{cite web|title=VESA DisplayPort Standard, Version 1, Revision 1a|url=http://file.yizimg.com/383992/2014090921252964.pdf|publisher=Video Electronics Standards Association (VESA) |date=11 January 2008|archive-url=https://web.archive.org/web/20160408072820/http://file.yizimg.com/383992/2014090921252964.pdf|archive-date=8 April 2016}}</ref>

DisplayPort 1.0–1.1a allow a maximum bandwidth of 10.8{{nbsp}}Gbit/s (8.64{{nbsp}}Gbit/s data rate) over a standard 4-lane main link. DisplayPort cables up to 2 meters in length are required to support the full 10.8{{nbsp}}Gbit/s bandwidth.<ref name="DP 1.1a" /> DisplayPort 1.1 allows devices to implement alternative link layers such as [[Optical fiber|fiber optic]], allowing a much longer reach between source and display without signal degradation,<ref>{{cite web |date=17 April 2007 |url=http://www.luxtera.com/2007041644/video-electronics-standards-association-vesa-endorses-alternative-to-copper-cables-%E2%80%93-enables-optical-video-interconnect-in-displayport-standard.html |title=Video Electronics Standards Association (VESA) Endorses Alternative to Copper Cables |publisher=[[Luxtera]] Inc. |access-date=19 January 2010|archive-url=https://web.archive.org/web/20100218120014/http://www.luxtera.com/2007041644/video-electronics-standards-association-vesa-endorses-alternative-to-copper-cables-%E2%80%93-enables-optical-video-interconnect-in-displayport-standard.html|archive-date=18 February 2010}}</ref> although alternative implementations are not standardized. It also includes [[HDCP]] in addition to DisplayPort Content Protection (DPCP). The DisplayPort{{nbsp}}1.1a standard can be downloaded free of charge from the VESA website.<ref name="VESA Free Standards">{{cite web|title=Free Standards |publisher=Video Electronics Standards Association (VESA) |url=https://www.vesa.org/vesa-standards/ |access-date=2 May 2018}}</ref>{{failed verification|date=August 2023}}

=== 1.2 ===
DisplayPort version 1.2 was introduced on 7 January 2010.<ref name="DP 1.2 press">{{cite web|title=VESA Introduces DisplayPort v1.2, the Most Comprehensive and Innovative Display Interface Available|url=https://www.vesa.org/press/vesa%C2%AE-introduces-displayporttm-v1-2-the-most-comprehensive-and-innovative-display-interface-available/|website=www.vesa.org|publisher=Video Electronics Standards Association (VESA)|access-date=2 May 2018|archive-url=https://web.archive.org/web/20180502064105/https://www.vesa.org/press/vesa%C2%AE-introduces-displayporttm-v1-2-the-most-comprehensive-and-innovative-display-interface-available/|archive-date=2 May 2018|date=7 January 2010}}</ref> The most significant improvement of this version is the doubling of the data rate to 17.28{{nbsp}}Gbit/s in High Bit Rate 2 (HBR2) mode, which allows increased resolutions, higher refresh rates, and greater color depth, such as {{resx|3840x2160}} at 60{{nbsp}}Hz 10{{nbsp}}bpc RGB. Other improvements include multiple independent video streams (daisy-chain connection with multiple monitors) called Multi-Stream Transport (MST), facilities for [[stereoscopy|stereoscopic 3D]], increased AUX channel bandwidth (from 1{{nbsp}}Mbit/s to 720{{nbsp}}Mbit/s), more color spaces including [[xvYCC]], [[scRGB]], and [[Adobe RGB 1998]], and Global Time Code (GTC) for sub 1{{nbsp}}μs audio/video synchronisation. Also [[Apple Inc.]]'s [[Mini DisplayPort]] connector, which is much smaller and designed for [[laptop computer]]s and other small devices, is compatible with the new standard.<ref name="ICCE" /><ref name="DevCon2010">{{Cite journal | url = http://www.vesa.org/events/developer-conference-presentations-posted/ | title = DisplayPort Developer Conference Presentations Posted | date = 6 December 2010 | publisher = Vesa }}</ref><ref name="GRAT583">{{cite web |url=http://download.microsoft.com/download/5/E/6/5E66B27B-988B-4F50-AF3A-C2FF1E62180F/GRA-T583_WH08.pptx |title=WinHEC 2008 GRA-583: Display Technologies |publisher=Microsoft |date=6 November 2008|archive-url=https://web.archive.org/web/20081227074524/http://download.microsoft.com/download/5/E/6/5E66B27B-988B-4F50-AF3A-C2FF1E62180F/GRA-T583_WH08.pptx|archive-date=27 December 2008}}</ref><ref>Tony Smith, [http://www.reghardware.co.uk/2009/01/13/displayport_1dot2_basics/ "DisplayPort revision to get mini connector, stereo 3D"] {{Webarchive|url=https://web.archive.org/web/20091014084951/http://www.reghardware.co.uk/2009/01/13/displayport_1dot2_basics/ |date=14 October 2009 }}, ''The Register'', 13 January 2009</ref>

=== 1.2a ===
DisplayPort version 1.2a was released in January 2013<ref>{{cite web|url=http://www.connectorsupplier.com/displayport-av-applications-next-five-years/|title=DisplayPort in A/V Applications in the Next Five Years|author=Joseph D. Cornwall|date=15 January 2014|work=connectorsupplier.com|access-date=10 May 2018}}</ref> and may optionally include VESA's ''Adaptive Sync''.<ref>{{cite web|url=http://www.vesa.org/featured-articles/vesa-adds-adaptive-sync-to-popular-displayport-video-standard/|title=VESA Adds 'Adaptive-Sync' to Popular DisplayPort Video Standard|date=12 May 2014|work=vesa.org|access-date=27 January 2016}}</ref> [[Advanced Micro Devices|AMD's]] ''[[FreeSync]]'' uses the DisplayPort Adaptive-Sync feature for operation. FreeSync was first demonstrated at [[Consumer Electronics Show|CES]] 2014 on a Toshiba Satellite laptop by making use of the Panel-Self-Refresh (PSR) feature from the Embedded DisplayPort standard,<ref>{{cite web|url=http://www.anandtech.com/show/7641/amd-demonstrates-freesync-free-gsync-alternative-at-ces-2014|title=AMD Demonstrates "FreeSync", Free G-Sync Alternative, at CES 2014|author=Anand Lal Shimpi|work=anandtech.com|access-date=27 January 2016}}</ref> and after a proposal from AMD, VESA later adapted the Panel-Self-Refresh feature for use in standalone displays and added it as an optional feature of the main DisplayPort standard under the name "Adaptive-Sync" in version 1.2a.<ref>{{cite web|url=http://www.hardware.fr/news/13545/amd-freesync-proposition-dp-1-2a.html|title=AMD 'FreeSync': proposition pour le DP 1.2a|work=hardware.fr|access-date=27 January 2016}}</ref> As it is an optional feature, support for Adaptive-Sync is not required for a display to be DisplayPort 1.2a-compliant.

=== 1.3 ===
DisplayPort version 1.3 was approved on 15 September 2014.<ref name="DP 1.3 press">{{cite web |url=http://www.vesa.org/uncategorized/vesa-releases-displayport-1-3-standard/ |archive-url=https://web.archive.org/web/20170812172042/http://www.vesa.org/uncategorized/vesa-releases-displayport-1-3-standard/ |title=VESA Releases DisplayPort 1.3 Standard |publisher=Video Electronics Standards Association (VESA) |date=15 September 2014 |access-date=27 January 2016 |archive-date=12 August 2017}}</ref> This standard increases overall transmission bandwidth to 32.4{{nbsp}}Gbit/s with the new HBR3 mode featuring 8.1{{nbsp}}Gbit/s per lane (up from 5.4{{nbsp}}Gbit/s with HBR2 in version 1.2), for a total data throughput of 25.92{{nbsp}}Gbit/s after factoring in 8b/10b encoding overhead. This bandwidth is enough for a [[Ultra-high-definition television|4K UHD]] display ({{resx|3840|2160}}) at 120{{nbsp}}Hz with 24{{nbsp}}bit/px RGB color, a 5K display ({{resx|5120|2880}}) at 60{{nbsp}}Hz with 30{{nbsp}}bit/px RGB color, or an [[Ultra-high-definition television|8K UHD]] display ({{resx|7680|4320}}) at 30{{nbsp}}Hz with 24{{nbsp}}bit/px RGB color. Using Multi-Stream Transport (MST), a DisplayPort port can drive two 4K UHD ({{resx|3840|2160}}) displays at 60{{nbsp}}Hz, or up to four WQXGA ({{resx|2560|1600}}) displays at 60{{nbsp}}Hz with 24{{nbsp}}bit/px RGB color. The new standard includes mandatory [[#Dual-mode|Dual-mode]] for DVI and HDMI adapters, implementing the [[HDMI]]{{nbsp}}2.0 standard and [[HDCP]]{{nbsp}}2.2 content protection.<ref>{{cite web|title = VESA Releases DisplayPort 1.3 Standard: 50% More Bandwidth, New Features|url = http://www.anandtech.com/show/8533/vesa-releases-displayport-13-standard-50-more-bandwidth-new-features|website = www.anandtech.com|access-date = 7 January 2016}}</ref> The [[Thunderbolt 3]] connection standard was originally to include DisplayPort{{nbsp}}1.3 capability, but the final release ended up with only version 1.2 for Intel® 6000 Series Thunderbolt™ 3 Controllers. Later Intel® 7000 Series Thunderbolt™3 Controllers would come to support DisplayPort{{nbsp}}1.4 capability including HDR. The VESA's Adaptive Sync feature in DisplayPort version 1.3 remains an optional part of the specification.<ref>{{cite web |url=http://www.anandtech.com/show/8533/vesa-releases-displayport-13-standard-50-more-bandwidth-new-features |title= VESA Releases DisplayPort 1.3 Standard: 50% More Bandwidth, New Features |date= 16 September 2014 |access-date=15 September 2016 |quote= DisplayPort Active-Sync remains an optional part of the specification, so Adaptive-Sync availability will continue to be on a monitor-by-monitor basis as a premium feature.}}</ref>

=== 1.4 ===
DisplayPort version 1.4 was published 1 March 2016.<ref name="DP 1.4 press">{{cite web |url=https://www.vesa.org/news/vesa-publishes-displayport-standard-version-1-4/ |archive-url=https://web.archive.org/web/20180103163937/https://www.vesa.org/news/vesa-publishes-displayport-standard-version-1-4/ |title= VESA Publishes DisplayPort Standard Version 1.4 |publisher=Video Electronics Standards Association (VESA) |date=1 March 2016 |access-date=2 March 2016 |archive-date=3 January 2018}}</ref> No new transmission modes are defined, so HBR3 (32.4{{nbsp}}Gbit/s) as introduced in version 1.3 still remains as the highest available mode. DisplayPort{{nbsp}}1.4 adds support for [[Display Stream Compression]] 1.2 (DSC), [[Forward Error Correction]], [[HDR10]] metadata defined in CTA-861.3, including static and dynamic metadata and the [[Rec. 2020]] color space, for HDMI interoperability,<ref>{{cite web|url=https://www.planar.com/blog/2018/2/28/displayport-14-vs-hdmi-21/|title=DisplayPort 1.4 vs HDMI 2.1|website=Planar}}</ref> and extends the maximum number of inline audio channels to 32.<ref name="VESAupdateDSC12">{{cite web |url=http://www.prnewswire.com/news-releases/vesa-updates-display-stream-compression-standard-to-support-new-applications-and-richer-display-content-300210420.html |title=VESA Updates Display Stream Compression Standard to Support New Applications and Richer Display Content |publisher=PRNewswire |date=27 January 2016 |access-date=29 January 2016}}</ref>

=== 1.4a ===
DisplayPort version 1.4a was published in April 2018.<ref name="DP 1.4a FAQ">{{cite web |title=FAQ{{Snd}} DisplayPort |url=https://www.displayport.org/faq/ |archive-url=https://web.archive.org/web/20181224123542/https://www.displayport.org/faq/ |archive-date=24 December 2018}}</ref> VESA made no official press release for this version. It updated DisplayPort's [[Display Stream Compression]] implementation from DSC 1.2 to 1.2a.<ref name="DSC Display Stream Compression">{{cite web |title=DSC Display Stream Compression |url=https://vesa.org/vesa-display-compression-codecs/dsc/ |archive-url=https://web.archive.org/web/20190710163312/https://vesa.org/vesa-display-compression-codecs/dsc/|archive-date=10 July 2019}}</ref>

=== 2.0 ===
On 26 June 2019, VESA formally released the DisplayPort 2.0 standard.<ref name="DP 2.0 Press Release">{{cite web |date=26 June 2019 |title=VESA Publishes DisplayPort 2.0 Video Standard Enabling Support for Beyond-8K Resolutions, Higher Refresh Rates For 4K/HDR and Virtual Reality Applications |url=https://vesa.org/press/vesa-publishes-displayport-2-0-video-standard-enabling-support-for-beyond-8k-resolutions-higher-refresh-rates-for-4k-hdr-and-virtual-reality-applications/ |access-date=26 June 2019}}</ref>
VESA stated that version 2.0 is the first major update to the DisplayPort standard since March 2016, and provides up to a ≈3× improvement in data rate (from 25.92 to 77.37{{nbsp}}Gbit/s) compared to the previous version of DisplayPort (1.4a), as well as new capabilities to address the future performance requirements of traditional displays. These include beyond 8K resolutions, higher refresh rates and high dynamic range (HDR) support at higher resolutions, improved support for multiple display configurations, as well as improved user experience with augmented/virtual reality (AR/VR) displays, including support for 4K-and-beyond VR resolutions.

According to a roadmap published by VESA in September 2016, a new version of DisplayPort was intended to be launched in "early 2017". It would have improved the link rate from 8.1 to 10.0{{nbsp}}Gbit/s, a 23% increase.<ref>{{Cite web|url=https://imgur.com/kvzntWj|title=imgur.com|website=Imgur}}</ref><ref>{{Cite web|url=https://www.vesa.org/wp-content/uploads/2016/10/USB-DevDays-DisplayPort-Alternate-Mode-2016-final4.pdf|title=VESA DisplayPort Alternate Mode on USB-C{{Snd}} Technical Overview|date=28 September 2016|publisher=USB Implementers Forum}}</ref> This would have increased the total bandwidth from 32.4{{nbsp}}Gbit/s to 40.0{{nbsp}}Gbit/s. However, no new version was released in 2017, likely delayed to make further improvements after the HDMI Forum announced in January 2017 that their next standard (HDMI{{nbsp}}2.1) would offer up to 48{{nbsp}}Gbit/s of bandwidth. According to a press release on 3 January 2018, "VESA is also currently engaged with its members in the development of the next DisplayPort standard generation, with plans to increase the data rate enabled by DisplayPort by two-fold and beyond. VESA plans to publish this update within the next 18 months."<ref>{{cite web|url=https://vesa.org/featured-articles/vesa-strengthens-8k-video-resolution-ecosystem-with-market-ready-dp8k-certified-displayport-cables/|title=VESA Strengthens 8K Video Resolution Ecosystem with Market-ready DP8K Certified DisplayPort Cables|date=3 January 2018|website=VESA{{Snd}} Interface Standards for The Display Industry}}</ref> At CES 2019, VESA announced that the new version would support 8K @ 60{{nbsp}}Hz without compression and was expected to be released in the first half of 2019.<ref>{{cite magazine|title=Display Technologies Ruled At CES 2019 |url=https://www.forbes.com/sites/moorinsights/2019/02/12/display-technologies-ruled-at-ces-2019/ |first=Anshel |last=Sag |magazine=[[Forbes.com]] |date=12 February 2019 |access-date=12 April 2019}}</ref>

==== DP 2.0 configuration examples ====

With the increased bandwidth enabled by DisplayPort 2.0, VESA offers a high degree of versatility and configurations for higher display resolutions and refresh rates. In addition to the above-mentioned 8K resolution at 60{{nbsp}}Hz with HDR support, DP 2.0 (UHBR20) through USB-C as DisplayPort Alt Mode enables a variety of high-performance configurations:<ref>https://vesa.org/press/vesa-publishes-displayport-2-0-video-standard-enabling-support-for-beyond-8k-resolutions-higher-refresh-rates-for-4k-hdr-and-virtual-reality-applications/</ref>

* '''Single display resolutions'''
** One 16K ({{resx|15360|8640}}) display @ 60{{nbsp}}Hz with 10{{nbsp}}bpc (30{{nbsp}}bit/px, HDR) RGB/{{YCbCr}} 4:4:4 color (with DSC)
** One 10K ({{resx|10240|4320}}) display @ 60{{nbsp}}Hz and 8{{nbsp}}bpc (24{{nbsp}}bit/px, SDR) RGB/{{YCbCr}} 4:4:4 color (uncompressed)
* '''Dual display resolutions'''
** Two 8K ({{resx|7680|4320}}) displays @ 120{{nbsp}}Hz and 10{{nbsp}}bpc (30{{nbsp}}bit/px, HDR) RGB/{{YCbCr}} 4:4:4 color (with DSC)
** Two 4K ({{resx|3840|2160}}) displays @ 144{{nbsp}}Hz and 8{{nbsp}}bpc (24{{nbsp}}bit/px, SDR) RGB/{{YCbCr}} 4:4:4 color (uncompressed)
* '''Triple display resolutions'''
** Three 10K ({{resx|10240|4320}}) displays @ 60{{nbsp}}Hz and 10{{nbsp}}bpc (30{{nbsp}}bit/px, HDR) RGB/{{YCbCr}} 4:4:4 color (with DSC)
** Three 4K ({{resx|3840|2160}}) displays @ 90{{nbsp}}Hz and 10{{nbsp}}bpc (30{{nbsp}}bit/px, HDR) RGB/{{YCbCr}} 4:4:4 color (uncompressed)

When using only two lanes on the USB-C connector via DP Alt Mode to allow for simultaneous SuperSpeed USB data and video, DP 2.0 can enable such configurations as:

* Three 4K ({{resx|3840|2160}}) displays @ 144{{nbsp}}Hz and 10{{nbsp}}bpc (30{{nbsp}}bit/px, HDR) RGB/{{YCbCr}} 4:4:4 color (with DSC)
* Two 4K × 4K ({{resx|4096|4096}}) displays (for AR/VR headsets) @ 120{{nbsp}}Hz and 10{{nbsp}}bpc (30{{nbsp}}bit/px, HDR) RGB/{{YCbCr}} 4:4:4 color (with DSC)
* Three QHD ({{resx|2560|1440}}) @ 120{{nbsp}}Hz and 8{{nbsp}}bpc (24{{nbsp}}bit/px, SDR) RGB/{{YCbCr}} 4:4:4 color (uncompressed)
* One 8K ({{resx|7680|4320}}) display @ 30{{nbsp}}Hz and 10{{nbsp}}bpc (30{{nbsp}}bit/px, HDR) RGB/{{YCbCr}} 4:4:4 color (uncompressed)

=== 2.1 ===

VESA announced version 2.1 of the DisplayPort standard on 17 October 2022.<ref name="DP 2.1 Press Release">{{cite web|title=VESA Releases DisplayPort 2.1 Specification |url=https://vesa.org/featured-articles/vesa-releases-displayport-2-1-specification/ |publisher=VESA |date=17 October 2022 |access-date=30 October 2022}}</ref> This version incorporates the new DP40 and DP80 cable certifications, which test DisplayPort cables for proper operation at the UHBR10 (40{{nbsp}}Gbit/s) and UHBR20 (80{{nbsp}}Gbit/s) speeds introduced in version 2.0. Additionally, it revises some of the electrical requirements for DisplayPort devices in order to improve integration with [[USB4]]. In VESA's words:

<blockquote>
DisplayPort 2.1 has tightened its alignment with the USB Type-C specification as well as the USB4 PHY specification to facilitate a common PHY servicing both DisplayPort and USB4. In addition, DisplayPort 2.1 has added a new DisplayPort bandwidth management feature to enable DisplayPort tunnelling to coexist with other I/O data traffic more efficiently over the USB4 link. 
</blockquote>

=== 2.1a ===
VESA announced version 2.1a of the DisplayPort standard on 8 January 2024.<ref name="DP 2.1a Press Release">{{Cite web |title=VESA Announces DisplayPort Updates and Extensions for Gaming and Automotive Market at CES |date=8 January 2024 |url=https://vesa.org/press/vesa-announces-displayport-updates-and-extensions-for-gaming-and-automotive-market-at-ces/}}</ref> This version replaces the DP40 cable certification with the new DP54 certification, which tests DisplayPort cables for proper operation at the UHBR13.5 (54{{nbsp}}Gbit/s) speed introduced in version 2.0.

== Specifications ==

=== Main ===
{| {{table}}
|-
! rowspan=2 | {{nbsp}}
! colspan=5 | DisplayPort version
|-
! style="min-width:80px" | 1.0{{ndash}}1.1a || style="min-width:80px" | 1.2{{ndash}}1.2a || style="min-width:80px" | 1.3 || style="min-width:80px" | 1.4{{ndash}}1.4a || style="min-width:80px" | 2.0{{ndash}}2.1a
|-
| Release date || May 2006 (1.0)<ref>{{cite web|last1=Kowaliski|first1=Cyril|title=DisplayPort 1.0 approved by VESA|url=https://techreport.com/news/9912/displayport-1-0-approved-by-vesa|website=www.techreport.com|publisher=The Tech Report|access-date=1 May 2018|date=4 May 2006}}</ref><br />Mar 2007 (1.1)<ref name="MPEG LA License">{{cite web|title=MPEG LA Expands DisplayPort License Coverage|url=http://www.mpegla.com/Lists/MPEG%20LA%20News%20List/Attachments/100/DisplayPort%20License%20Coverage%20PrsRls%202016-08-08.pdf|access-date=2 May 2018|date=8 August 2016|archive-date=15 May 2018|archive-url=https://web.archive.org/web/20180515043521/http://www.mpegla.com/Lists/MPEG%20LA%20News%20List/Attachments/100/DisplayPort%20License%20Coverage%20PrsRls%202016-08-08.pdf|url-status=dead}}</ref><br />Jan 2008 (1.1a)<ref name="DP 1.1a" />

| Jan 2010 (1.2)<ref name="DP 1.2 press"/><br />May 2012 (1.2a)<ref name="MPEG LA License"/>

| Sep 2014<ref name="DP 1.3 press"/>

| Mar 2016 (1.4)<ref name="DP 1.4 press"/><br />Apr 2018 (1.4a)<ref name="DP 1.4a FAQ" />

| Jun 2019 (2.0)<ref name="DP 2.0 Press Release"/><br />Oct 2022 (2.1)<ref name="DP 2.1 Press Release"/><br />Jan 2024 (2.1a)<ref name="DP 2.1a Press Release"/>
|-
|style="background:#EAECF0"| '''Main link'''
! colspan="5" |
|-
|Transmission modes: || colspan="5" |
|-
| style="padding-left: 1.5em;" | RBR (1.62{{nbsp}}Gbit/s per lane) || {{yes}}<ref name="DP 1.0">{{Citation |title=DisplayPort Standard, Version 1 |publisher=Video Electronics Standards Association (VESA) |date=1 May 2006 |url=https://archive.org/details/VESADisplayPortStandardV1.0}}</ref>{{rp|at=§1.6.1|quote=Two link rates are supported: 2.7Gbps and 1.62Gbps per lane.}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| style="padding-left: 1.5em;" | HBR (2.70{{nbsp}}Gbit/s per lane) || {{yes}}<ref name="DP 1.0" />{{rp|at=§1.6.1|quote=Two link rates are supported: 2.7Gbps and 1.62Gbps per lane.}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| style="padding-left: 1.5em;" | HBR2 (5.40{{nbsp}}Gbit/s per lane) || {{no}} || {{yes}}<ref name="DP 1.2">{{Citation |title=DisplayPort Standard, Version 1, Revision 2 |publisher=Video Electronics Standards Association (VESA) |date=5 January 2010}}</ref>{{rp|at=§2.1.1|quote=DisplayPort supports three options for the number of Main Link lanes and two options for Main Link data rate per lane as follows: 4-, 2-, or 1-lane; 5.4Gbps, 2.7Gbps or 1.62Gbps per lane}} || {{yes}} || {{yes}} || {{yes}}
|-
| style="padding-left: 1.5em;" | HBR3 (8.10{{nbsp}}Gbit/s per lane) || {{no}} || {{no}} || {{yes}}<ref name="DP 1.3 press" /> || {{yes}} || {{yes}}
|-
| style="padding-left: 1.5em;" | UHBR 10 (10.0{{nbsp}}Gbit/s per lane) || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}}
|-
| style="padding-left: 1.5em;" | UHBR 13.5 (13.5{{nbsp}}Gbit/s per lane) || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}}
|-
| style="padding-left: 1.5em;" | UHBR 20 (20.0{{nbsp}}Gbit/s per lane) || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}}
|-
| Number of lanes || {{right}} <ref name="DP 1.1a" />{{rp|at=§1.7.1|quote=The number of lanes of Main Link is 1, 2, or 4 lanes.}} 4 || {{right}} 4 || {{right}} 4 || {{right}} 4 || {{right}} 4
|-
| Maximum total bandwidth{{efn|name=bandwidth|Total bandwidth (the number of binary digits transmitted per second) is equal to the bandwidth per lane of the highest supported transmission mode multiplied by the number of lanes.}} || {{right}} 10.80{{nbsp}}Gbit/s || {{right}} 21.60{{nbsp}}Gbit/s || {{right}} 32.40{{nbsp}}Gbit/s || {{right}} 32.40{{nbsp}}Gbit/s || {{right}} 80.00{{nbsp}}Gbit/s
|-
| Maximum total data rate{{efn|name=datarate|While the total bandwidth represents the number of physical bits transmitted across the interface, not all of the bits represent video data. Some of the transmitted bits are used for encoding purposes, so the rate at which video data can be transmitted across the DisplayPort interface is only a portion of the total bandwidth.}} || {{right}} 8.64{{nbsp}}Gbit/s<br /> || {{right}} 17.28{{nbsp}}Gbit/s || {{right}} 25.92{{nbsp}}Gbit/s || {{right}} 25.92{{nbsp}}Gbit/s || {{right}} 77.3<!-- Do not use 77.57 Gbit/s; see Talk page -->7{{nbsp}}Gbit/s
|-
| Encoding scheme{{efn|name=encoding|The 8b/10b encoding scheme uses 10 bits of bandwidth to send 8 bits of data, so only 80% of the bandwidth is available for data throughput. The extra 2 bits are used for DC balancing (ensuring a roughly equal number of 1s and 0s). They consume bandwidth, but do not represent any data.}} || {{right}} <ref name="DP 1.1a" />{{rp|at=§1.7.1|quote=All the lanes carry data. There is no dedicated clock channel. The clock is extracted from the data stream itself that is encoded with ANSI 8B/10B coding rule (the channel coding specified in ANSI X3.230-1994, clause 11).}} 8b/10b || {{right}} 8b/10b || {{right}} 8b/10b || {{right}} 8b/10b || {{right}} 128b/132b
|-
| Compression (optional) || {{right}}{{Snd}} || {{right}}{{Snd}} || {{right}}{{Snd}} || {{right}} DSC{{nbsp}}1.2 (DP{{nbsp}}1.4)<br />DSC{{nbsp}}1.2a (DP{{nbsp}}1.4a) || {{right}} DSC{{nbsp}}1.2a
|-
|style="background:#EAECF0"| '''Auxiliary channel'''
! colspan="5" |
|-
| Maximum bandwidth || {{right}} <ref name="DP 1.1a" />{{rp|at=Fig. 3-3}} 2{{nbsp}}Mbit/s || {{right}} <ref name="DP 1.2" />{{rp|at=§3.4|quote=For FAUX transactions, the AUX CH uses 8B10B encoding, transmitting data at a rate of 720MBaud after 8B10B encoding. This provides an effective data rate of 576Mbps prior to 8B10B encoding.}} 720{{nbsp}}Mbit/s || {{right}} 2{{nbsp}}Mbit/s || {{right}} 2{{nbsp}}Mbit/s || {{right}} 2{{nbsp}}Mbit/s
|-
| Maximum data rate || {{right}} <ref name="DP 1.1a" />{{rp|at=§3.4}} 1{{nbsp}}Mbit/s || {{right}} <ref name="DP 1.2" />{{rp|at=§3.4|quote=For FAUX transactions, the AUX CH uses 8B10B encoding, transmitting data at a rate of 720MBaud after 8B10B encoding. This provides an effective data rate of 576Mbps prior to 8B10B encoding.}} 576{{nbsp}}Mbit/s || {{right}} 1{{nbsp}}Mbit/s || {{right}} 1{{nbsp}}Mbit/s || {{right}} 1{{nbsp}}Mbit/s
|-
| Encoding scheme || {{right}}  <ref name="DP 1.1a" />{{rp|at=§1.7.2|quote=AUX CH consists of an ac-coupled, doubly terminated differential pair. Manchester II coding is used as the channel coding for the AUX CH. As is the case with main link, the clock is extracted from the data stream.}} Manchester{{nbsp}}II || {{right}} <ref name="DP 1.2" />{{rp|at=§3.4|quote=For FAUX transactions, the AUX CH uses 8B10B encoding, transmitting data at a rate of 720MBaud after 8B10B encoding. This provides an effective data rate of 576Mbps prior to 8B10B encoding.}} 8b/10b || {{right}} Manchester{{nbsp}}II || {{right}} Manchester{{nbsp}}II || {{right}} Manchester{{nbsp}}II
|-
|style="background:#EAECF0"| '''Color format support'''
! colspan="5" |
|-
| RGB || {{yes}}<ref name="DP 1.0" />{{rp|at=§1.6.1|quote=Component bit depths of 6, 8, 10, 12, and 16 are supported with the colorimetry formats of RGB, YCbCr444/422 in DisplayPort Ver.1.0 regardless of the number of Main Link lanes.}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| {{YCbCr}} 4:4:4 || {{yes}}<ref name="DP 1.0" />{{rp|at=§1.6.1|quote=Component bit depths of 6, 8, 10, 12, and 16 are supported with the colorimetry formats of RGB, YCbCr444/422 in DisplayPort Ver.1.0 regardless of the number of Main Link lanes.}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| {{YCbCr}} 4:2:2 || {{yes}}<ref name="DP 1.0" />{{rp|at=§1.6.1|quote=Component bit depths of 6, 8, 10, 12, and 16 are supported with the colorimetry formats of RGB, YCbCr444/422 in DisplayPort Ver.1.0 regardless of the number of Main Link lanes.}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| {{YCbCr}} 4:2:0 || {{no}}  || {{no}}  || {{yes}} || {{yes}} || {{yes}}
|-
| Y-only (monochrome) || {{no}}  || {{yes}}<ref name="DP 1.2" />{{rp|at=§2.2.4.3}}  || {{yes}} || {{yes}} || {{yes}}
|-
|style="background:#EAECF0"| '''Color depth support'''
! colspan="5" |
|-
| {{0}}6{{nbsp}}bpc (18{{nbsp}}bit/px) || {{yes}}<ref name="DP 1.0" />{{rp|at=§1.6.1|quote=Component bit depths of 6, 8, 10, 12, and 16 are supported with the colorimetry formats of RGB, YCbCr444/422 in DisplayPort Ver.1.0 regardless of the number of Main Link lanes.}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| {{0}}8{{nbsp}}bpc (24{{nbsp}}bit/px) || {{yes}}<ref name="DP 1.0" />{{rp|at=§1.6.1|quote=Component bit depths of 6, 8, 10, 12, and 16 are supported with the colorimetry formats of RGB, YCbCr444/422 in DisplayPort Ver.1.0 regardless of the number of Main Link lanes.}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| 10{{nbsp}}bpc (30{{nbsp}}bit/px) || {{yes}}<ref name="DP 1.0" />{{rp|at=§1.6.1|quote=Component bit depths of 6, 8, 10, 12, and 16 are supported with the colorimetry formats of RGB, YCbCr444/422 in DisplayPort Ver.1.0 regardless of the number of Main Link lanes.}}  || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| 12{{nbsp}}bpc (36{{nbsp}}bit/px) || {{yes}}<ref name="DP 1.0" />{{rp|at=§1.6.1|quote=Component bit depths of 6, 8, 10, 12, and 16 are supported with the colorimetry formats of RGB, YCbCr444/422 in DisplayPort Ver.1.0 regardless of the number of Main Link lanes.}}  || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| 16{{nbsp}}bpc (48{{nbsp}}bit/px) || {{yes}}<ref name="DP 1.0" />{{rp|at=§1.6.1|quote=Component bit depths of 6, 8, 10, 12, and 16 are supported with the colorimetry formats of RGB, YCbCr444/422 in DisplayPort Ver.1.0 regardless of the number of Main Link lanes.}}  || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|style="background:#EAECF0"| '''Color space support'''
! colspan="5" |
|-
| ITU-R BT.601 || {{yes}}<ref name="DP 1.1a" />{{rp|at=§2.2.4}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| ITU-R BT.709 || {{yes}}<ref name="DP 1.1a" />{{rp|at=§2.2.4}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| sRGB || {{no}}{{efn|In DisplayPort 1.0–1.1a, RGB images are simply sent without any specific colorimetry information}} || {{yes}}<ref name="DP 1.2" />{{rp|at=§2.2.4.3}} || {{yes}} || {{yes}} || {{yes}}
|-
| scRGB || {{no}} || {{yes}}<ref name="DP 1.2" />{{rp|at=§2.2.4.3}} || {{yes}} || {{yes}} || {{yes}}
|-
| xvYCC || {{no}} || {{yes}}<ref name="DP 1.2" />{{rp|at=§2.2.4.3}} || {{yes}} || {{yes}} || {{yes}}
|-
| Adobe RGB (1998) || {{no}} || {{yes}}<ref name="DP 1.2" />{{rp|at=§2.2.4.3}} || {{yes}} || {{yes}} || {{yes}}
|-
| DCI-P3 || {{no}} || {{yes}}<ref name="DP 1.2" />{{rp|at=§2.2.4.3}} || {{yes}} || {{yes}} || {{yes}}
|-
| Simplified color profile || {{no}} || {{yes}}<ref name="DP 1.2" />{{rp|at=§2.2.4.3}} || {{yes}} || {{yes}} || {{yes}}
|-
| ITU-R BT.2020 || {{no}} || {{no}} || {{yes}}<ref>{{cite web |title=DisplayPort – Future Proofing Display Connectivity for VR and 8K HDR |author=Syed Athar Hussain |url=https://www.vesa.org/wp-content/uploads/2016/06/Display-Summit-USA-2016-AMD-VESA-SAH_Final_r1.pdf |date=June 2016 |access-date=11 May 2018}}</ref>{{rp|page=4}} || {{yes}} || {{yes}}
|-
|style="background:#EAECF0"| '''Audio specifications'''
! colspan="5" |
|-
| Max. sample rate || {{right}} <ref name="DP 1.1a" />{{rp|at=§1.2.5|quote=DisplayPort supports up to eight channels of LPCM (Linear Pulse Code Modulation) audio at 192&nbsp;kHz with a 24 bit sample size.}} 192{{nbsp}}kHz || {{right}} <ref name="DP 1.2" />{{rp|at=§2.2.5.3|quote=IEC-61937 encoded Bit rates exceeding 6.144Mbps will be known as Audio High bit rate. DisplayPort will allow 2 different high bit rate transports such as 12.288Mbps, 24.576Mbps. These bit rates will use the following configuration to transport the data in IEC-60958 format. 24.576Mbps = 2 channel 16 bit and 768KHz. 12.288Mbps = 2 channel 16 bit and 384KHz. Dolby True-HD and DTS Master Audio formats require higher bit rates for transport. DisplayPort Source device shall use one of these 2 High bit rates to transmit such encoded content.}} 768{{nbsp}}kHz || {{right}} 768{{nbsp}}kHz || {{right}}<ref name="DP 1.4 press" /> 1536{{nbsp}}kHz || {{dunno}}
|-
| Max. sample size || {{right}} <ref name="DP 1.1a" />{{rp|at=§1.2.5|quote=DisplayPort supports up to eight channels of LPCM (Linear Pulse Code Modulation) audio at 192&nbsp;kHz with a 24 bit sample size.}} 24{{nbsp}}bits || {{right}} 24{{nbsp}}bits || {{right}} 24{{nbsp}}bits || {{right}} 24{{nbsp}}bits || {{dunno}}
|-
| Maximum audio channels || {{right}} <ref name="DP 1.1a" />{{rp|at=§1.2.5|quote=DisplayPort supports up to eight channels of LPCM (Linear Pulse Code Modulation) audio at 192&nbsp;kHz with a 24 bit sample size.}} 8 || {{right}} 8 || {{right}} 8 || {{right}} 32 || {{dunno}}
|-
! rowspan=2 | {{nbsp}}
! style="min-width:80px" | 1.0–1.1a || style="min-width:80px" | 1.2–1.2a || style="min-width:80px" | 1.3 || style="min-width:80px" | 1.4–1.4a || style="min-width:80px" | 2.0–2.1a
|-
! colspan=5 | DisplayPort version
|}
{{notelist}}

==== Main link ====

The DisplayPort ''main link'' is used for transmission of video and audio. The main link consists of a number of unidirectional serial data channels which operate concurrently, called ''lanes''. A standard DisplayPort connection has 4 lanes, though some applications of DisplayPort implement more, such as the [[Thunderbolt 3]] interface which implements up to 8 lanes of DisplayPort.<ref>{{cite web |title=Thunderbolt 3 Technology Brief |url=https://thunderbolttechnology.net/sites/default/files/Thunderbolt3_TechBrief_FINAL.pdf |date=2016 |access-date=14 May 2018 |publisher=Intel Corporation}}</ref>{{rp|page=4}}

In a standard DisplayPort connection, each lane has a dedicated set of twisted-pair wires, and transmits data across it using [[differential signaling]]. This is a [[self-clocking signal|self-clocking]] system, so no dedicated clock signal channel is necessary.<ref name="DP 1.1a" />{{rp|at=§1.7.1}} Unlike DVI and HDMI, which vary their transmission speed to the exact rate required for the specific video format, DisplayPort only operates at a few specific speeds; any excess bits in the transmission are filled with "stuffing symbols".<ref name="DP 1.1a" />{{rp|at=§2.2.1.4}}

In DisplayPort versions 1.0{{ndash}}1.4a, the data is encoded using ANSI [[8b/10b encoding]] prior to transmission. With this scheme, only 8 out of every 10 transmitted bits represent data; the extra bits are used for DC balancing (ensuring a roughly equal number of 1s and 0s). As a result, the rate at which data can be transmitted is only 80% of the physical bitrate. The transmission speeds are also sometimes expressed in terms of the "Link Symbol Rate", which is the rate at which these 8b/10b-encoded symbols are transmitted (i.e. the rate at which groups of 10 bits are transmitted, 8 of which represent data). The following transmission modes are defined in version 1.0{{ndash}}1.4a:
* '''RBR''' (Reduced Bit Rate): 1.62{{nbsp}}Gbit/s bandwidth per lane (162{{nbsp}}MHz link symbol rate)
* '''HBR''' (High Bit Rate): 2.70{{nbsp}}Gbit/s bandwidth per lane (270{{nbsp}}MHz link symbol rate)
* '''HBR2''' (High Bit Rate 2): 5.40{{nbsp}}Gbit/s bandwidth per lane (540{{nbsp}}MHz link symbol rate), introduced in DP{{nbsp}}1.2
* '''HBR3''' (High Bit Rate 3): 8.10{{nbsp}}Gbit/s bandwidth per lane (810{{nbsp}}MHz link symbol rate), introduced in DP{{nbsp}}1.3

DisplayPort 2.0 uses 128b/132b encoding; each group of 132 transmitted bits represents 128 bits of data. This scheme has an efficiency of 96.{{overline|96}}%.<ref name="DP 2.0 Anandtech">{{cite web|url=https://www.anandtech.com/show/14590/vesa-announces-displayport-20-standard-bandwidth-for-8k-monitors-beyond |title=VESA Announces DisplayPort 2.0 Standard: Bandwidth For 8K Monitors & Beyond |date=26 June 2019 |first=Ryan |last=Smith |publisher=Anandtech}}</ref> In addition, a small amount of overhead is added for the link layer control packet and other miscellaneous operations, resulting in an overall efficiency of ≈96.7%.<ref name="DP 2.1">VESA DisplayPort Standard, Version 2.1. Video Electronics Standards Association (VESA). 10 October 2022.</ref>{{rp|at=§3.5.2.18}} The following transmission modes are added in DP 2.0:
* '''UHBR 10''' (Ultra High Bit Rate 10): 10.0{{nbsp}}Gbit/s bandwidth per lane
* '''UHBR 13.5''' (Ultra High Bit Rate 13.5): 13.5{{nbsp}}Gbit/s bandwidth per lane
* '''UHBR 20''' (Ultra High Bit Rate 20): 20.0{{nbsp}}Gbit/s bandwidth per lane

The '''total bandwidth''' of the main link in a standard 4-lane connection is the aggregate of all lanes:
* '''RBR''': {{0}}4 × 1.62{{nbsp}}Gbit/s = {{0}}6.48{{nbsp}}Gbit/s bandwidth (data rate of 5.184{{nbsp}}Gbit/s or 648{{nbsp}}MB/s with 8b/10b encoding)
* '''HBR''': {{0}}4 × 2.70{{nbsp}}Gbit/s = 10.80{{nbsp}}Gbit/s bandwidth (data rate of 8.64{{nbsp}}Gbit/s or 1.08{{nbsp}}GB/s)
* '''HBR2''': 4 × 5.40{{nbsp}}Gbit/s = 21.60{{nbsp}}Gbit/s bandwidth (data rate of 17.28{{nbsp}}Gbit/s or 2.16{{nbsp}}GB/s)
* '''HBR3''': 4 × 8.10{{nbsp}}Gbit/s = 32.40{{nbsp}}Gbit/s bandwidth (data rate of 25.92{{nbsp}}Gbit/s or 3.24{{nbsp}}GB/s)
* '''UHBR 10''': 4 × 10.0{{nbsp}}Gbit/s = 40.00{{nbsp}}Gbit/s bandwidth (data rate of 38.6<!-- Do not use 38.78 Gbit/s; see Talk page -->9{{nbsp}}Gbit/s or 4.84{{nbsp}}GB/s with 128b/132b encoding and FEC)
* '''UHBR 13.5''': 4 × 13.5{{nbsp}}Gbit/s = 54.00{{nbsp}}Gbit/s bandwidth (data rate of 52.2<!-- Do not use 52.36 Gbit/s; see Talk page -->2{{nbsp}}Gbit/s or 6.52{{nbsp}}GB/s)
* '''UHBR 20''': 4 × 20.0{{nbsp}}Gbit/s = 80.00{{nbsp}}Gbit/s bandwidth (data rate of 77.3<!-- Do not use 77.57 Gbit/s; see Talk page -->7{{nbsp}}Gbit/s or 9.69{{nbsp}}GB/s)

The transmission mode used by the DisplayPort main link is negotiated by the source and sink device when a connection is made, through a process called ''Link Training''. This process determines the maximum possible speed of the connection. If the quality of the DisplayPort cable is insufficient to reliably handle HBR2 speeds for example, the DisplayPort devices will detect this and switch down to a lower mode to maintain a stable connection.<ref name="DP 1.1a" />{{rp|at=§2.1.1}} The link can be re-negotiated at any time if a loss of synchronization is detected.<ref name="DP 1.1a" />{{rp|at=§1.7.3}}

Audio data is transmitted across the main link during the video blanking intervals (short pauses between each line and frame of video data).<ref name="DP 1.1a" />{{rp|at=§2.2.5.3}}

==== Auxiliary channel ====

The DisplayPort AUX channel is a [[half-duplex]] (bidirectional) data channel used for miscellaneous additional data beyond video and audio, such as EDID ([[I2C|I<sup>2</sup>C]]) or CEC commands.<ref name="DP 1.1a" />{{rp|at=§2.4}} This bidirectional data channel is required, since the video lane signals are unidirectional from source to display. AUX signals are transmitted across a dedicated set of twisted-pair wires. DisplayPort{{nbsp}}1.0 specified [[Manchester code|Manchester encoding]] with a 2{{nbsp}}[[baud|MBd]] signal rate (1{{nbsp}}Mbit/s data rate).<ref name="DP 1.1a" />{{rp|at=§3.4}} Version 1.2 of the DisplayPort standard introduced a second transmission mode called FAUX (Fast AUX), which operated at 720{{nbsp}}Mbit/s with 8b/10b encoding (576{{nbsp}}Mbit/s data rate),<ref name="DP 1.2" />{{rp|at=§3.4}} but it was deprecated in version 1.3.

== Cables and connectors ==
=== Cables ===

==== Compatibility and feature support ====

All DisplayPort cables are compatible with all DisplayPort devices, regardless of the version of each device or the cable certification level.<ref name="VESA DP cable article">{{cite web |title=How to Choose a DisplayPort Cable, and Not Get a Bad One! |archive-url=https://web.archive.org/web/20130705035148/http://www.displayport.org/cables/how-to-choose-a-displayport-cable-and-not-get-a-bad-one/ |archive-date=5 July 2013 |url=http://www.displayport.org/cables/how-to-choose-a-displayport-cable-and-not-get-a-bad-one/ |publisher=DisplayPort.org |author=Craig Wiley |date=25 April 2013}}</ref>

All features of DisplayPort will function across any DisplayPort cable. DisplayPort does not have multiple cable designs; all DP cables have the same basic layout and wiring, and will support any feature including audio, daisy-chaining, [[G-Sync]]/[[FreeSync]], HDR, and DSC.

DisplayPort cables differ in their transmission speed support. DisplayPort specifies seven different transmission modes (RBR, HBR, HBR2, HBR3, UHBR{{nbsp}}10, UHBR{{nbsp}}13.5, and UHBR{{nbsp}}20) which support progressively higher bandwidths. Not all DisplayPort cables are capable of all seven transmission modes. VESA offers certifications for various levels of bandwidth. These certifications are optional, and not all DisplayPort cables are certified by VESA.

Cables with limited transmission speed are still compatible with all DisplayPort devices, but may place limits on the maximum resolution or refresh rate available.

DisplayPort cables are not classified by "version". Although cables are commonly labeled with version numbers, with HBR2 cables advertised as "DisplayPort{{nbsp}}1.2 cables" for example, this notation is not permitted by VESA.<ref name="VESA DP cable article" /> The use of version numbers with cables can falsely imply that a DisplayPort{{nbsp}}1.4 display requires a "DisplayPort{{nbsp}}1.4 cable", or that features introduced in version 1.4 such as HDR or DSC will not function with older "DP{{nbsp}}1.2 cables". DisplayPort cables are classified only by their bandwidth certification level (RBR, HBR, HBR2, HBR3, etc.), if they have been certified at all.

==== Cable bandwidth and certifications ====

Not all DisplayPort cables are capable of functioning at the highest levels of bandwidth. Cables may be submitted to VESA for an optional certification at various bandwidth levels. VESA offers five levels of cable certification: Standard, DP8K, DP40, DP54, and DP80.<ref name="DP 2.1" />{{rp|at=§4.1}} These certify DisplayPort cables for proper operation at the following speeds:

{| {{table}}
|+ DisplayPort cable certifications
|-
! Transmission mode
! Transmission<br />bit rate
! Minimum required <br/>cable certification
|-
| '''RBR''' (Reduced Bit Rate) || {{right}} 6.48{{nbsp}}Gbit/s || rowspan="3" | Standard VESA-certified DisplayPort cable
|-
| '''HBR''' (High Bit Rate) || {{right}} 10.80{{nbsp}}Gbit/s
|-
| '''HBR2''' (High Bit Rate 2) || {{right}} 21.60{{nbsp}}Gbit/s
|-
| '''HBR3''' (High Bit Rate 3) || {{right}} 32.40{{nbsp}}Gbit/s || DP8K DisplayPort cable
|-
| '''UHBR10''' (Ultra High Bit Rate 10) || {{right}} 40.00{{nbsp}}Gbit/s || DP40 cable
|-
| '''UHBR13.5''' (Ultra High Bit Rate 13.5) || {{right}} 54.00{{nbsp}}Gbit/s || DP54 cable
|-
| '''UHBR20''' (Ultra High Bit Rate 20) || {{right}} 80.00{{nbsp}}Gbit/s || DP80 cable
|}

In April 2013, VESA published an article stating that the DisplayPort cable certification did not have distinct tiers for HBR and HBR2 bandwidth, and that any certified standard DisplayPort cable—including those certified under DisplayPort{{nbsp}}1.1—would be able to handle the 21.6{{nbsp}}Gbit/s bandwidth of HBR2 that was introduced with the DisplayPort 1.2 standard.<ref name="VESA DP cable article" /> The DisplayPort{{nbsp}}1.2 standard defines only a single specification for High Bit Rate cable assemblies, which is used for both HBR and HBR2 speeds, although the DP cable certification process is governed by the DisplayPort PHY Compliance Test Standard (CTS) and not the DisplayPort standard itself.<ref name="DP 1.2"/>{{rp|at=§5.7.1, §4.1}}

The '''DP8K''' certification was announced by VESA in January 2018, and certifies cables for proper operation at HBR3 speeds (8.1{{nbsp}}Gbit/s per lane, 32.4{{nbsp}}Gbit/s total).<ref name="DP8K press">{{cite web |title=VESA Strengthens 8K Video Resolution Ecosystem with Market-ready DP8K Certified DisplayPort Cables |publisher=Video Electronics Standards Association (VESA) |archive-url=https://web.archive.org/web/20180514094554/https://www.vesa.org/featured-articles/vesa-strengthens-8k-video-resolution-ecosystem-with-market-ready-dp8k-certified-displayport-cables/ |archive-date=14 May 2018 |url=https://www.vesa.org/featured-articles/vesa-strengthens-8k-video-resolution-ecosystem-with-market-ready-dp8k-certified-displayport-cables/ |date=3 January 2018 |access-date=14 May 2018}}</ref>

In June 2019, with the release of version 2.0 of the DisplayPort Standard, VESA announced that the DP8K certification was also sufficient for the new UHBR10 transmission mode. No new certifications were announced for the UHBR13.5 and UHBR20 modes. VESA is encouraging displays to use tethered cables for these speeds, rather than releasing standalone cables onto the market.<ref name="DP 2.0 Anandtech" />

It should also be noted that the use of Display Stream Compression (DSC), introduced in DisplayPort{{nbsp}}1.4, greatly reduces the bandwidth requirements for the cable. Formats which would normally be beyond the limits of DisplayPort{{nbsp}}1.4, such as 4K (3840{{resx}}2160) at 144{{nbsp}}Hz 8{{nbsp}}bpc RGB/{{YCbCr}} 4:4:4 (31.4{{nbsp}}Gbit/s data rate when uncompressed), can only be implemented by using DSC. This would reduce the physical bandwidth requirements by 2–3×, placing it well within the capabilities of an HBR2-rated cable.

This exemplifies why DisplayPort cables are not classified by "version"; although DSC was introduced in version 1.4, this does not mean it needs a so-called "DP{{nbsp}}1.4 cable" (an HBR3-rated cable) to function. HBR3 cables are only required for applications which exceed HBR2-level bandwidth, not simply any application involving DisplayPort{{nbsp}}1.4. If DSC is used to reduce the bandwidth requirements to HBR2 levels, then an HBR2-rated cable will be sufficient.

In version 2.1, VESA introduced the DP40 and DP80 cable certification tiers, which validate cables for UHBR10 and UHBR20 speeds respectively. DisplayPort 2.1a introduced DP54 cable certification for UHBR13.5 speed.

==== Cable length ====

The DisplayPort standard does not specify any maximum length for cables, though the DisplayPort 1.2 standard does set a minimum requirement that all cables up to 2 meters in length must support HBR2 speeds (21.6{{nbsp}}Gbit/s), and all cables of any length must support RBR speeds (6.48{{nbsp}}Gbit/s).<ref name="DP 1.2" />{{rp|at=§5.7.1, §4.1}} Cables longer than 2 meters may or may not support HBR/HBR2 speeds, and cables of any length may or may not support HBR3 speeds or above.

=== Connectors and pin configuration ===
[[File:DisplayPort on a computer.jpg|right|thumb|DisplayPort output on a computer]]
DisplayPort cables and ports may have either a "full-size" connector or a "mini" connector. These connectors differ only in physical shape—the capabilities of DisplayPort are the same regardless of which connector is used. Using a Mini DisplayPort connector does not affect performance or feature support of the connection.

==== Full-size DisplayPort connector ====

<!-- Image to be added... soon™ -->
The standard DisplayPort connector (now referred to as a "full-size" connector to distinguish it from the mini connector)<ref name="DP 1.2" />{{rp|at=§4.1.1|quote="4.1.1 Cable-Connector Assembly Definition – A DisplayPort Cable Assembly consists of two plug-type connectors terminating both ends of a bulk cable. The plug on either end may be a full-size DisplayPort plug or a Mini DisplayPort plug."}} was the sole connector type introduced in DisplayPort{{nbsp}}1.0. It is a 20-pin single-orientation connector with a friction lock and an optional mechanical latch. The standard DisplayPort receptacle has dimensions of 16.10{{nbsp}}mm (width) × 4.76{{nbsp}}mm (height) × 8.88{{nbsp}}mm (depth).<ref name="DP 1.1a" />{{rp|at=§4.2.1.7, p201}}

The standard DisplayPort connector pin allocation is as follows:<ref name="DP 1.1a" />{{rp|at=§4.2.1}}
* '''12 pins for the main link''' – the main link consists of four [[shielded twisted pair]]s. Each pair requires 3 pins; one for each of the two wires, and a third for the shield.<ref name="DP 1.1a" />{{rp|at=§4.1.2, p183}} (pins 1–12)
* '''2 additional ground pins''' – (pins 13 and 14)
* '''3 pins for the auxiliary channel''' – the auxiliary channel uses another 3-pin shielded twisted pair (pins 15–17)
* '''1 pin for HPD''' – hot-plug detection (pin 18)
* '''2 pins for power''' – 3.3{{nbsp}}V power and return line (pins 19 and 20)

==== Mini DisplayPort connector ====

[[File:Mdp plug.jpg|Mini DisplayPort plug|thumb]]
The Mini DisplayPort connector was developed by [[Apple Inc.|Apple]] for use in their computer products. It was first announced in October 2008 for use in the new MacBooks and Cinema Display. In 2009, VESA adopted it as an official standard, and in 2010 the specification was merged into the main DisplayPort standard with the release of DisplayPort{{nbsp}}1.2. Apple freely licenses the specification to VESA.

The Mini DisplayPort (mDP) connector is a 20-pin single-orientation connector with a friction lock. Unlike the full-size connector, it does not have an option for a mechanical latch. The mDP receptacle has dimensions of 7.50{{nbsp}}mm (width) × 4.60{{nbsp}}mm (height) × 4.99{{nbsp}}mm (depth).<ref name="mDP 1.0">{{cite web |title=Mini DisplayPort Connector Standard, Version 1.0 |url=https://archive.org/details/MiniDisplayPortConnectorSpecificationV1.0 |publisher=Video Electronics Standards Association (VESA) |date=26 October 2009 |access-date=13 May 2018}}</ref>{{rp|at=§2.1.3.6, pp27–31}} The mDP pin assignments are the same as the full-size DisplayPort connector.<ref name="mDP 1.0" />{{rp|at=§2.1.3}}

==== DP_PWR (pin 20) ====

Pin 20 on the DisplayPort connector, called DP_PWR, provides 3.3{{nbsp}}V (±10%) DC power at up to 500{{nbsp}}mA (minimum power delivery of 1.5{{nbsp}}W).<ref name="DP 1.1a" />{{rp|at=§3.2}} This power is available from all DisplayPort receptacles, on both source and display devices. DP_PWR is intended to provide power for adapters, amplified cables, and similar devices, so that a separate power cable is not necessary.

Standard DisplayPort cable connections do not use the DP_PWR pin. Connecting the DP_PWR pins of two devices directly together through a cable can create a [[short circuit]] which can potentially damage devices, since the DP_PWR pins on two devices are unlikely to have exactly the same voltage (especially with a ±10% tolerance).<ref>{{cite web |title=The DisplayPort Pin 20 Problem |url=http://monitorinsider.com/displayport/dp_pin20_controversy.html |publisher=Monitor Insider |access-date=14 May 2018 |archive-url=https://web.archive.org/web/20180514112410/http://monitorinsider.com/displayport/dp_pin20_controversy.html |archive-date=14 May 2018}}</ref> For this reason, the DisplayPort{{nbsp}}1.1 and later standards specify that passive DisplayPort-to-DisplayPort cables must leave pin 20 unconnected.<ref name="DP 1.1a" />{{rp|at=§3.2.2|quote=A standard DisplayPort cable must have no wire for the DP_PWR pin.}}

However, in 2013 VESA announced that after investigating reports of malfunctioning DisplayPort devices, it had discovered that a large number of non-certified vendors were manufacturing their DisplayPort cables with the DP_PWR pin connected:
{{blockquote
|''Recently VESA has experienced quite a few complaints regarding troublesome DisplayPort operation that ended up being caused by improperly made DisplayPort cables.  These "bad" DisplayPort cables are generally limited to non-DisplayPort certified cables, or off-brand cables.  To further investigate this trend in the DisplayPort cable market, VESA purchased a number of non-certified, off-brand cables and found that an alarmingly high number of these were configured improperly and would likely not support all system configurations.  None of these cables would have passed the DisplayPort certification test, moreover some of these cables could potentially damage a PC, laptop, or monitor.''
}}

The stipulation that the DP_PWR wire be omitted from standard DisplayPort cables was not present in the DisplayPort{{nbsp}}1.0 standard. However, DisplayPort products (and cables) did not begin to appear on the market until 2008, long after version 1.0 had been replaced by version 1.1. The DisplayPort{{nbsp}}1.0 standard was never implemented in commercial products.<ref>{{cite magazine |title=Dell UltraSharp 3008WFP 30-Inch LCD Monitor |url=https://www.washingtonpost.com/wp-dyn/content/article/2008/01/03/AR2008010301753.html |date=3 January 2008 |access-date=14 May 2018 |author=Roy Santos |magazine=PC World |archive-url=https://web.archive.org/web/20180323030630/http://www.washingtonpost.com/wp-dyn/content/article/2008/01/03/AR2008010301753.html |archive-date=23 March 2018}}</ref>

== Resolution and refresh frequency limits ==

The tables below describe the refresh frequencies that can be achieved with each transmission mode. In general, maximum refresh frequency is determined by the transmission mode (RBR, HBR, HBR2, HBR3, UHBR10, UHBR13.5, or UHBR20). These transmission modes were introduced to the DisplayPort standard as follows:
* '''RBR''' and '''HBR''' were defined in the initial release of the DisplayPort standard, version 1.0
* '''HBR2''' was introduced in version 1.2
* '''HBR3''' was introduced in version 1.3
* '''UHBR10''', '''UHBR13.5''', and '''UHBR20''' were introduced in version 2.0
However, transmission mode support is not necessarily dictated by a device's claimed "DisplayPort version number". For example, older versions of the DisplayPort Marketing Guidelines allowed a device to be labeled as "DisplayPort 1.2" if it supported the MST feature, even if it didn't support the HBR2 transmission mode.<ref>{{citation|title=VESA DisplayPort Marketing Guidelines version 1.1|url=https://www.vesa.org/wp-content/uploads/2013/06/DisplayPort-Marketing-Guidelines-v1_1.pdf|archive-url=https://web.archive.org/web/20201112020758/https://www.vesa.org/wp-content/uploads/2013/06/DisplayPort-Marketing-Guidelines-v1_1.pdf|archive-date=12 November 2020}}</ref>{{rp|page=9}} Newer versions of the guidelines have removed this clause, and currently (as of the June 2018 revision) there are no guidelines on the usage of DisplayPort version numbers in products.<ref>{{cite web |title=DisplayPort Marketing Guidelines R14 |url=http://www.displayport.org/wp-content/uploads/2018/07/DP_Marketing_Guidelines_R14.pdf |date=8 June 2018 |archive-url=https://web.archive.org/web/20190325043317/http://www.displayport.org/wp-content/uploads/2018/07/DP_Marketing_Guidelines_R14.pdf |archive-date=25 March 2019 |access-date=25 March 2019 |url-status=live }}</ref> DisplayPort "version numbers" are therefore not a reliable indication of what transmission speeds a device can support.

In addition, individual devices may have their own arbitrary limitations beyond transmission speed. For example, [[NVIDIA]] [[Kepler (microarchitecture)|Kepler GK104]] GPUs (such as the GeForce GTX 680 and 770) support "DisplayPort 1.2" with the HBR2 transmission mode, but are limited to 540{{nbsp}}Mpx/s, only {{3/4}} of the maximum possible with HBR2.<ref>{{Cite web|url=https://www.dell.com/community/Monitors/GTX-770-4gb-Unable-to-select-144hz-on-dell-S2716DG/td-p/4710119|archive-url=https://web.archive.org/web/20200730010929/https://www.dell.com/community/Monitors/GTX-770-4gb-Unable-to-select-144hz-on-dell-S2716DG/td-p/4710119|title=GTX 770 4gb Unable to select 144hz on dell S2716DG.|archive-date=30 July 2020|date=4 February 2016}}</ref> Consequently, certain devices may have limitations that differ from those listed in the following tables.

To support a particular format, the '''source''' and '''display''' devices must both support the required transmission mode, and the DisplayPort cable must also be capable of handling the required bandwidth of that transmission mode. (See: [[#Cables and connectors|Cables and connectors]])

=== Refresh frequency limits for common resolutions ===

The maximum limits for the RBR and HBR modes are calculated using standard data rate calculations.<ref>{{Cite web |title=Video Timings Calculator |url=https://tomverbeure.github.io/video_timings_calculator |access-date=2022-06-20 |website=tomverbeure.github.io}}</ref> For UHBR modes, the limits are based on the data efficiency calculations provided by the DisplayPort standard.<ref name="DP 2.0">{{cite web|title=VESA DisplayPort (DP) Standard, Version 2.0|url=https://vesa.org/join-vesamemberships/member-downloads/|publisher=Video Electronics Standards Association (VESA) |date=26 June 2019}}</ref>{{rp|at=§3.5.2.18}} All calculations assume uncompressed RGB video with [[Coordinated Video Timings|CVT-RB v2]] timing. Maximum limits may differ if compression (i.e. DSC) or {{YCbCr}} 4:2:2 or 4:2:0 chroma subsampling are used.

Display manufacturers may also use non-standard blanking intervals rather than CVT-RB v2 to achieve even higher frequencies when bandwidth is a constraint. The refresh frequencies in the below table do not represent the absolute maximum limit of each interface, but rather an estimate based on a modern standardized timing formula. The minimum blanking intervals (and therefore the exact maximum frequency that can be achieved) will depend on the display and how many secondary data packets it requires, and therefore will differ from model to model.

{| class="wikitable"
! colspan="3" |Video format
! colspan="7" |Transmission mode, and maximum data rate
|-
! rowspan="3" |Short-<br>hand
! rowspan="3" |Resolution
! rowspan="3" |Channel<br>color<br>depth<br>(bits)
! RBR
! HBR
! HBR2
! HBR3
! UHBR10
! UHBR13.5
! UHBR20
|-
!5.184{{nbsp}}Gbit/s
!8.64{{nbsp}}Gbit/s
!17.28{{nbsp}}Gbit/s
!25.92{{nbsp}}Gbit/s
!38.68{{nbsp}}Gbit/s
!52.22{{nbsp}}Gbit/s
!77.37{{nbsp}}Gbit/s
|-
! colspan="7" | Maximum refresh frequency with CVT-RB v2 timing, uncompressed (Hz)
|-  
| rowspan="2" |1080p
| rowspan="2" |{{resx|1920|1080}}
| style="text-align:right;"  |8||  {{partial|95}}  ||  {{yes|154}} ||  {{yes2|288}} ||  {{yes2|406}}  ||  {{yes2|555}} ||  {{yes2|688}} ||  {{yes2|884}}
|-
| style="text-align:right;" |10||  {{partial|77}}  ||  {{yes|125}}  ||  {{yes|237}} ||  {{yes2|337}}  ||  {{yes2|468}} ||  {{yes2|587}} ||  {{yes2|770}}
|-
| rowspan="2" |1440p
| rowspan="2" |{{resx|2560|1440}}
| style="text-align:right;"  |8||  {{no|55}}  ||  {{partial|90}}  ||  {{yes|174}} ||  {{yes2|251}}  ||  {{yes2|354}}  ||  {{yes2|452}} ||  {{yes2|609}}
|-
| style="text-align:right;" |10||  {{no|44}}  ||  {{partial|73}}  ||  {{yes|141}} || {{yes|205}} || {{yes2|293}} ||  {{yes2|378}}  ||  {{yes2|516}}
|-
| rowspan="2" |UWQHD
| rowspan="2" |{{resx|3440|1440}}
| style="text-align:right;"  |8||  {{no|41}} ||  {{partial|68}}  || {{yes|133}} || {{yes|193}} ||  {{yes2|277}}  ||  {{yes2|358}} ||  {{yes2|491}}
|-
| style="text-align:right;" |10||  {{no|33}} ||  {{no|55}}  ||  {{partial|107}}  ||  {{yes|157}} || {{yes|227}} || {{yes2|296}}  ||  {{yes2|412}}
|-
| rowspan="2" |4K
| rowspan="2" |{{resx|3840|2160}}
| style="text-align:right;"  |8||  style="background:white;" | ||  {{no|41}}  ||  {{partial|81}}  ||  {{yes|120}}  ||  {{yes|174}} || {{yes|229}} || {{yes2|323}}
|-
| style="text-align:right;" |10||  style="background:white;" | ||  {{no|33}}  ||  {{partial|65}}  ||  {{partial|97}}  ||  {{yes|142}} || {{yes|187}} || {{yes2|267}}
|-
| rowspan="2" |5K
| rowspan="2" |{{resx|5120|2880}}
| style="text-align:right;"  |8||  style="background:white;" | ||  style="background:white;" |  ||  {{no|47}}  ||  {{partial|69}}  ||  {{partial|102}} || {{yes|136}} || {{yes|195}}
|-
| style="text-align:right;" |10||  style="background:white;" | ||  style="background:white;" |  ||  {{no|37}}  ||  {{no|56}}  ||  {{partial|82}} || {{partial|110}} || {{yes|159}}
|-
| rowspan="2" |8K
| rowspan="2" |{{resx|7680|4320}}
| style="text-align:right;"  |8||  style="background:white;" | || style="background:white;" |  || style="background:white;" |  ||  {{no|31}}  ||  {{no|47}} || {{partial|63}} || {{partial|92}}
|-
| style="text-align:right;" |10||  style="background:white;" | || style="background:white;" |  || style="background:white;" |  || style="background:white;" |  ||  {{no|37}} || {{no|50}} || {{partial|74}}
|}

{{legend|#FFFFFF|Below 30 Hz}}
{{legend|#FFC7C7|{{0}}30{{ndash}}60{{nbsp}}Hz}}
{{legend|#FFFFBB|{{0}}60{{ndash}}120{{nbsp}}Hz}}
{{legend|#9EFF9E|120{{ndash}}240{{nbsp}}Hz}}
{{legend|#BBFFDD|Above 240{{nbsp}}Hz}}

{{notelist}}

=== Refresh frequency limits for standard video ===

Color depth of 8{{nbsp}}bpc (24{{nbsp}}bit/px or 16.7 million colors) is assumed for all formats in these tables. This is the standard color depth used on most computer displays. Note that some operating systems refer to this as "32-bit" color depth—this is the same as 24-bit color depth. The 8 extra bits are for alpha channel information, which is only present in software. At the transmission stage, this information has already been incorporated into the primary color channels, so the actual video data transmitted across the cable only contains 24 bits per pixel.

{| class="wikitable mw-collapsible mw-expanded"
|-
! colspan=11 style="height:2.5em;" | Limits for uncompressed RGB / {{YCbCr}} 4:4:4 video only
|-
! colspan=4 | Video format
! colspan=7 | Transmission mode, and maximum data rate{{efn|Only a portion of DisplayPort's bandwidth is used for carrying video data. The RBR, HBR, HBR2, and HBR3 transmission modes use 8b/10b encoding, which means that 80% of the bits transmitted across the link represent data, and the other 20% are used for encoding purposes. The maximum bit rates of these modes (6.48, 10.8, 21.6, and 32.4{{nbsp}}Gbit/s) therefore transport video data at rates of 5.184, 8.64, 17.28, and 25.92{{nbsp}}Gbit/s respectively. DisplayPort UHBR modes use 128b/132b encoding, and therefore the maximum bit rates of UHBR10, 13.5, and 20 (40, 54, and 80{{nbsp}}Gbit/s) transport data at rates of 38.69, 52.22, and 77.37{{nbsp}}Gbit/s.}}
|-
! rowspan=2 | Shorthand
! rowspan=2 | Resolution
! rowspan=2 | Refresh<br />rate (Hz)
! rowspan=2 | Data rate<br />required{{efn|These data rates are for uncompressed 8{{nbsp}}bpc (24{{nbsp}}bit/px) color depth with RGB or YC<sub>B</sub>C<sub>R</sub> 4:4:4 color format and CVT-R2 timing. Uncompressed data rate for RGB video in bits per second is calculated as bits per pixel × pixels per frame × frames per second. Pixels per frame includes blanking intervals as defined by [[Coordinated Video Timings|CVT-R2]].}}
! RBR
! HBR
! HBR2
! HBR3
! UHBR10
! UHBR13.5
! UHBR20
|-
!5.184{{nbsp}}Gbit/s
!8.64{{nbsp}}Gbit/s
!17.28{{nbsp}}Gbit/s
!25.92{{nbsp}}Gbit/s
!38.69{{nbsp}}Gbit/s
!52.22{{nbsp}}Gbit/s
!77.37{{nbsp}}Gbit/s
|-
| rowspan="5" | 1080p || rowspan="5" | 1920{{resx}}1080 || align="right"|60||align="right"|3.20{{nbsp}}Gbit/s|| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|85||align="right"|4.59{{nbsp}}Gbit/s|| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|6.59{{nbsp}}Gbit/s|| {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|8.00{{nbsp}}Gbit/s|| {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|14.00{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| rowspan="7" | 1440p || rowspan="7" | 2560{{resx}}1440 || align="right"|30||align="right"|2.78{{nbsp}}Gbit/s|| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|5.63{{nbsp}}Gbit/s|| {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|85||align="right"|8.07{{nbsp}}Gbit/s|| {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|11.59{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|14.08{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|165||align="right"|16.30{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|24.62{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| rowspan="7" | 4K   || rowspan="7" | 3840{{resx}}2160  || align="right"|24||align="right"|4.93{{nbsp}}Gbit/s|| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|30||align="right"|6.18{{nbsp}}Gbit/s|| {{no}} || {{yes}} || {{yes}} || {{yes}}  || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|12.54{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|75||align="right"|15.79{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes}} || {{yes}}  || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|25.82{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|31.35{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|54.84{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes2|Yes{{efn|name=close_enough|Although this format slightly exceeds the maximum data rate of this transmission mode with CVT-R2 timing, it is close enough to be achieved with non-standard timings}}}} || {{yes}}
|-
| rowspan="7" | 5K   || rowspan="7" | 5120{{resx}}2880  || align="right"|24||align="right"|8.73{{nbsp}}Gbit/s|| {{no}} || {{yes2|Yes{{efn|name=close_enough}}}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|30||align="right"|10.94{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|22.18{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|45.66{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|55.44{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}}
|-
|                                                     align="right"|180||align="right"|70.54{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|96.98{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}}
|-
| rowspan="5" | 8K   || rowspan="5" | 7680{{resx}}4320  || align="right"|24||align="right"|19.53{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|30||align="right"|24.48{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|49.65{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|85||align="right"|71.17{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|102.20{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}}
|-
! rowspan=2 colspan=4 |
! RBR
! HBR
! HBR2
! HBR3
! UHBR 10
! UHBR 13.5
! UHBR 20
|-
! colspan=7 | Transmission mode
|}
{{noteslist}}

{| class="wikitable mw-collapsible mw-collapsed"
|-
! colspan=11 style="height:2.5em;" | Limits including compression and chroma subsampling
|-
! colspan=4 | Video format
! colspan=7 | Transmission mode, and maximum data rate{{efn|Only a portion of DisplayPort's bandwidth is used for carrying video data. The RBR, HBR, HBR2, and HBR3 transmission modes use 8b/10b encoding, which means that 80% of the bits transmitted across the link represent data, and the other 20% are used for encoding purposes. The maximum bit rates of these modes (6.48, 10.8, 21.6, and 32.4{{nbsp}}Gbit/s) therefore transport video data at rates of 5.184, 8.64, 17.28, and 25.92{{nbsp}}Gbit/s respectively. DisplayPort UHBR modes use 128b/132b encoding, and therefore the maximum bit rates of UHBR10, 13.5, and 20 (40, 54, and 80{{nbsp}}Gbit/s) transport data at rates of 38.69, 52.22, and 77.37{{nbsp}}Gbit/s.}}
|-
! rowspan=2 | Shorthand
! rowspan=2 | Resolution
! rowspan=2 | Refresh<br />rate (Hz)
! rowspan=2 | Data rate<br />required{{efn|These data rates are for uncompressed 8{{nbsp}}bpc (24{{nbsp}}bit/px) color depth with RGB or YC<sub>B</sub>C<sub>R</sub> 4:4:4 color format and CVT-R2 timing. Uncompressed data rate for RGB video in bits per second is calculated as bits per pixel × pixels per frame × frames per second. Pixels per frame includes blanking intervals as defined by [[Coordinated Video Timings|CVT-R2]].}}
! RBR
! HBR
! HBR2
! HBR3
! UHBR10
! UHBR13.5
! UHBR20
|-
!5.184{{nbsp}}Gbit/s
!8.64{{nbsp}}Gbit/s
!17.28{{nbsp}}Gbit/s
!25.92{{nbsp}}Gbit/s
!38.69{{nbsp}}Gbit/s
!52.22{{nbsp}}Gbit/s
!77.37{{nbsp}}Gbit/s
|-
| rowspan="5" | 1080p || rowspan="5" | 1920{{resx}}1080 || align="right"|60||align="right"|3.20{{nbsp}}Gbit/s|| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|85||align="right"|4.59{{nbsp}}Gbit/s|| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|6.59{{nbsp}}Gbit/s|| {{yes2|DSC{{efn|name=DSC|This format can only be achieved with full RGB color if DSC (display stream compression) is used.}} or 4:2:2{{efn|name=subsampling|This format can only be achieved uncompressed if the YC<sub>B</sub>C<sub>R</sub> format with either 4:2:2 or 4:2:0 chroma subsampling (as noted) is used}}}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|8.00{{nbsp}}Gbit/s|| {{yes2|DSC or 4:2:0}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|14.00{{nbsp}}Gbit/s|| {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| rowspan="7" | 1440p || rowspan="7" | 2560{{resx}}1440 || align="right"|30||align="right"|2.78{{nbsp}}Gbit/s|| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|5.63{{nbsp}}Gbit/s|| {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|85||align="right"|8.07{{nbsp}}Gbit/s|| {{yes2|DSC or 4:2:0}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|11.59{{nbsp}}Gbit/s|| {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|14.08{{nbsp}}Gbit/s|| {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|165||align="right"|16.30{{nbsp}}Gbit/s|| {{partial|DSC + 4:2:2{{efn|name=DSC_and_subsampling|This format can only be achieved if DSC is used together with either YCbCr 4:2:2 or 4:2:0 chroma subsampling (as noted)}}}} || {{yes2|DSC or 4:2:0}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|24.62{{nbsp}}Gbit/s|| {{partial|DSC + 4:2:0}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| rowspan="7" | 4K   || rowspan="7" | 3840{{resx}}2160  || align="right"|24||align="right"|4.93{{nbsp}}Gbit/s|| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|30||align="right"|6.18{{nbsp}}Gbit/s|| {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|12.54{{nbsp}}Gbit/s|| {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|75||align="right"|15.79{{nbsp}}Gbit/s|| {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes}} || {{yes}}  || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|25.82{{nbsp}}Gbit/s|| {{partial|DSC + 4:2:0}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|31.35{{nbsp}}Gbit/s|| {{partial|DSC + 4:2:0}} || {{partial|DSC + 4:2:2}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|54.84{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{partial|DSC + 4:2:2}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes2|Yes{{efn|name=close_enough|Although this format slightly exceeds the maximum data rate of this transmission mode with CVT-R2 timing, it is close enough to be achieved with non-standard timings}}}} || {{yes}}
|-
| rowspan="7" | 5K   || rowspan="7" | 5120{{resx}}2880  || align="right"|24||align="right"|8.73{{nbsp}}Gbit/s|| {{yes2|DSC or 4:2:0}} || {{yes2|Yes{{efn|name=close_enough}}}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|30||align="right"|10.94{{nbsp}}Gbit/s|| {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|22.18{{nbsp}}Gbit/s|| {{partial|DSC + 4:2:2}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|45.66{{nbsp}}Gbit/s|| {{no}} || {{partial|DSC + 4:2:0}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|55.44{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{partial|DSC + 4:2:2}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes2|DSC or 4:2:2}} || {{yes}}
|-
|                                                     align="right"|180||align="right"|70.54{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{partial|DSC + 4:2:2}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|96.98{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{partial|DSC + 4:2:0}} || {{partial|DSC + 4:2:2}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}}
|-
| rowspan="7" | 8K   || rowspan="7" | 7680{{resx}}4320  || align="right"|24||align="right"|19.53{{nbsp}}Gbit/s|| {{partial|DSC + 4:2:2}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|30||align="right"|24.48{{nbsp}}Gbit/s|| {{partial|DSC + 4:2:0}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|49.65{{nbsp}}Gbit/s|| {{no}} || {{partial|DSC + 4:2:0}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|85||align="right"|71.17{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{partial|DSC + 4:2:2}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|102.20{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{partial|DSC + 4:2:0}}  || {{partial|DSC + 4:2:2}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}}
|-
|                                                     align="right"|144||align="right"|124.09{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{partial|DSC + 4:2:0}} || {{partial|DSC + 4:2:2}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}}
|-
|                                                     align="right"|240||align="right"|217.10{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{partial|DSC + 4:2:0}} || {{partial|DSC + 4:2:2}} || {{yes2|DSC}}
|-
! rowspan=2 colspan=4 |
! RBR
! HBR
! HBR2
! HBR3
! UHBR10
! UHBR13.5
! UHBR20
|-
! colspan=7 | Transmission mode
|}
{{noteslist}}

=== Refresh frequency limits for HDR video ===

Color depth of 10{{nbsp}}bpc (30{{nbsp}}bit/px or 1.07 billion colors) is assumed for all formats in these tables. This color depth is a requirement for various common HDR standards, such as [[HDR10]]. It requires 25% more bandwidth than standard 8{{nbsp}}bpc video.

HDR extensions were defined in version 1.4 of the DisplayPort standard. Some displays support these HDR extensions, but may only implement HBR2 transmission mode if the extra bandwidth of HBR3 is unnecessary (for example, on 4K 60{{nbsp}}Hz HDR displays). Since there is no definition of what constitutes a "DisplayPort 1.4" device, some manufacturers may choose to label these as "DP 1.2" devices despite their support for DP 1.4 HDR extensions.<ref>{{cite web |title=LG 27UK650-W 4K UHD LED Monitor |url=https://www.lg.com/us/monitors/lg-27UK650-W-4k-uhd-led-monitor |archive-url=https://web.archive.org/web/20181118183112/https://www.lg.com/us/monitors/lg-27UK650-W-4k-uhd-led-monitor |archive-date=18 November 2018}}</ref> As a result, DisplayPort "version numbers" should not be used as an indicator of HDR support.

{| class="wikitable mw-collapsible"
|-
! colspan=11 style="height:2.5em;" | Limits for uncompressed RGB / {{YCbCr}} 4:4:4 video only
|-
! colspan=4 | Video format
! colspan=7 | Transmission mode, and maximum data rate{{efn|Only a portion of DisplayPort's bandwidth is used for carrying video data. The RBR, HBR, HBR2, and HBR3 transmission modes use 8b/10b encoding, which means that 80% of the bits transmitted across the link represent data, and the other 20% are used for encoding purposes. The maximum bit rates of these modes (6.48, 10.8, 21.6, and 32.4{{nbsp}}Gbit/s) therefore transport video data at rates of 5.184, 8.64, 17.28, and 25.92{{nbsp}}Gbit/s respectively. DisplayPort UHBR modes use 128b/132b encoding, and therefore the maximum bit rates of UHBR10, 13.5, and 20 (40, 54, and 80{{nbsp}}Gbit/s) transport data at rates of 38.69, 52.22, and 77.37{{nbsp}}Gbit/s.}}
|-
! rowspan=2 | Shorthand
! rowspan=2 | Resolution
! rowspan=2 | Refresh<br />rate (Hz)
! rowspan=2 | Data rate<br />required{{efn|These data rates are for uncompressed 10{{nbsp}}bpc (30{{nbsp}}bit/px) color depth with RGB or YC<sub>B</sub>C<sub>R</sub> 4:4:4 color format and CVT-R2 timing. Uncompressed data rate for RGB video in bits per second is calculated as bits per pixel × pixels per frame × frames per second. Pixels per frame includes blanking intervals as defined by [[Coordinated Video Timings|CVT-R2]].}}
! RBR
! HBR
! HBR2
! HBR3
! UHBR10
! UHBR13.5
! UHBR20
|-
!5.184{{nbsp}}Gbit/s
!8.64{{nbsp}}Gbit/s
!17.28{{nbsp}}Gbit/s
!25.92{{nbsp}}Gbit/s
!38.69{{nbsp}}Gbit/s
!52.22{{nbsp}}Gbit/s
!77.37{{nbsp}}Gbit/s
|-
| rowspan="5" | 1080p || rowspan="5" | 1920{{resx}}1080 || align="right"|60||align="right"|4.00{{nbsp}}Gbit/s|| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|100||align="right"|6.80{{nbsp}}Gbit/s|| {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|8.24{{nbsp}}Gbit/s|| {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|10.00{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|17.50{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes2|Yes{{efn|name=close_enough|Although this format slightly exceeds the maximum data rate of this transmission mode with CVT-R2 timing, it is close enough to be achieved with non-standard timings}}}} || {{yes}}  || {{yes}} || {{yes}} || {{yes}}
|-
| rowspan="7" | 1440p || rowspan="7" | 2560{{resx}}1440 || align="right"|30||align="right"|3.47{{nbsp}}Gbit/s|| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|7.04{{nbsp}}Gbit/s|| {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|75||align="right"|8.86{{nbsp}}Gbit/s|| {{no}} || {{yes2|Yes{{efn|name=close_enough}}}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|14.49{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|17.60{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes2|Yes{{efn|name=close_enough}}}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|200||align="right"|25.12{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|30.77{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}}
|-
| rowspan="7" | 4K   || rowspan="7" | 3840{{resx}}2160  || align="right"|30||align="right"|7.73{{nbsp}}Gbit/s|| {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|15.68{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|98||align="right"|26.07{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{yes2|Yes{{efn|name=close_enough}}}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|32.27{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|39.19{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{yes2|Yes{{efn|name=close_enough}}}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|180||align="right"|49.85{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|68.56{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}}
|-
| rowspan="7" | 5K   || rowspan="7" | 5120{{resx}}2880  || align="right"|30||align="right"|13.67{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|50||align="right"|22.99{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|27.72{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|85||align="right"|39.75{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{yes2|Yes{{efn|name=close_enough}}}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|100||align="right"|47.10{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|57.08{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|69.30{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}}
|-
| rowspan="5" | 8K   || rowspan="5" | 7680{{resx}}4320  || align="right"|24||align="right"|24.41{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|30||align="right"|30.60{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|50||align="right"|51.47{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|62.06{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}}
|-
|                                                     align="right"|75||align="right"|78.13{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes2|Yes{{efn|name=close_enough}}}}
|-
! rowspan=2 colspan=4 |
! RBR
! HBR
! HBR2
! HBR3
! UHBR10
! UHBR13.5
! UHBR20
|-
! colspan=7 | Transmission mode
|}
{{noteslist}}

{| class="wikitable mw-collapsible mw-collapsed"
|-
! colspan=11 style="height:2.5em;" | Limits including compression and chroma subsampling
|-
! colspan=4 | Video format
! colspan=7 | Transmission mode, and maximum data rate{{efn|Only a portion of DisplayPort's bandwidth is used for carrying video data. The RBR, HBR, HBR2, and HBR3 transmission modes use 8b/10b encoding, which means that 80% of the bits transmitted across the link represent data, and the other 20% are used for encoding purposes. The maximum bit rates of these modes (6.48, 10.8, 21.6, and 32.4{{nbsp}}Gbit/s) therefore transport video data at rates of 5.184, 8.64, 17.28, and 25.92{{nbsp}}Gbit/s respectively. DisplayPort UHBR modes use 128b/132b encoding, and therefore the maximum bit rates of UHBR10, 13.5, and 20 (40, 54, and 80{{nbsp}}Gbit/s) transport data at rates of 38.69, 52.22, and 77.37{{nbsp}}Gbit/s.}}
|-
! rowspan=2 | Shorthand
! rowspan=2 | Resolution
! rowspan=2 | Refresh<br />rate (Hz)
! rowspan=2 | Data rate<br />required{{efn|These data rates are for uncompressed 10{{nbsp}}bpc (30{{nbsp}}bit/px) color depth with RGB or YC<sub>B</sub>C<sub>R</sub> 4:4:4 color format and CVT-R2 timing. Uncompressed data rate for RGB video in bits per second is calculated as bits per pixel × pixels per frame × frames per second. Pixels per frame includes blanking intervals as defined by [[Coordinated Video Timings|CVT-R2]].}}
! RBR
! HBR
! HBR2
! HBR3
! UHBR10
! UHBR13.5
! UHBR20
|-
!5.184{{nbsp}}Gbit/s
!8.64{{nbsp}}Gbit/s
!17.28{{nbsp}}Gbit/s
!25.92{{nbsp}}Gbit/s
!38.69{{nbsp}}Gbit/s
!52.22{{nbsp}}Gbit/s
!77.37{{nbsp}}Gbit/s
|-
| rowspan="5" | 1080p || rowspan="5" | 1920{{resx}}1080 || align="right"|60||align="right"|4.00{{nbsp}}Gbit/s|| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|100||align="right"|6.80{{nbsp}}Gbit/s|| {{yes2|DSC{{efn|name=DSC|This format can only be achieved with full RGB color if DSC (display stream compression) is used. A compression ratio of 3.75:1 (8{{nbsp}}bit/px compression) is assumed here.}} or 4:2:2{{efn|name=subsampling|This format can only be achieved uncompressed if the YC<sub>B</sub>C<sub>R</sub> format with either 4:2:2 or 4:2:0 chroma subsampling (as noted) is used}}}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|8.24{{nbsp}}Gbit/s|| {{yes2|DSC or 4:2:0}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|10.00{{nbsp}}Gbit/s|| {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|17.50{{nbsp}}Gbit/s|| {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|Yes{{efn|name=close_enough|Although this format slightly exceeds the maximum data rate of this transmission mode with CVT-R2 timing, it is close enough to be achieved with non-standard timings}}}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| rowspan="7" | 1440p || rowspan="7" | 2560{{resx}}1440 || align="right"|30||align="right"|3.47{{nbsp}}Gbit/s|| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|7.04{{nbsp}}Gbit/s|| {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|75||align="right"|8.86{{nbsp}}Gbit/s|| {{yes2|DSC or 4:2:0}} || {{yes2|Yes{{efn|name=close_enough}}}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|14.49{{nbsp}}Gbit/s|| {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|17.60{{nbsp}}Gbit/s|| {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|Yes{{efn|name=close_enough}}}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|200||align="right"|25.12{{nbsp}}Gbit/s|| {{partial|DSC + 4:2:0{{efn|name=dsc_subsampling|This format can only be achieved if DSC and chroma subsampling are used together. The DisplayPort standard permits lower values for DSC output size when subsampling is used; 6{{nbsp}}bit/px for 4:2:0 subsampling and 7{{nbsp}}bit/px for 4:2:2 subsampling, compared to 8{{nbsp}}bit/px for non-subsampled output (RGB and 4:4:4).}}}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|30.77{{nbsp}}Gbit/s|| {{no}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}}
|-
| rowspan="8" | 4K   || rowspan="8" | 3840{{resx}}2160  || align="right"|30||align="right"|7.73{{nbsp}}Gbit/s|| {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|15.68{{nbsp}}Gbit/s|| {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|75||align="right"|19.74{{nbsp}}Gbit/s|| {{partial|DSC + 4:2:2}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|98||align="right"|26.07{{nbsp}}Gbit/s|| {{no}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes2|Yes{{efn|name=close_enough}}}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|32.27{{nbsp}}Gbit/s|| {{no}} || {{partial|DSC + 4:2:2}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|39.19{{nbsp}}Gbit/s|| {{no}} || {{partial|DSC + 4:2:0}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|180||align="right"|49.85{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|68.56{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{partial|DSC + 4:2:2}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}}
|-
| rowspan="7" | 5K   || rowspan="7" | 5120{{resx}}2880  || align="right"|30||align="right"|13.67{{nbsp}}Gbit/s|| {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|50||align="right"|22.99{{nbsp}}Gbit/s|| {{partial|DSC + 4:2:0}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|27.72{{nbsp}}Gbit/s|| {{no}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|100||align="right"|47.10{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|120||align="right"|57.08{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes2|DSC}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes2|DSC or 4:2:2}} || {{yes}}
|-
|                                                     align="right"|144||align="right"|69.30{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{partial|DSC + 4:2:2}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}}
|-
|                                                     align="right"|240||align="right"|121.23{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{partial|DSC + 4:2:0}} || {{yes2|DSC}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}}
|-
| rowspan="8" | 8K   || rowspan="8" | 7680{{resx}}4320  || align="right"|24||align="right"|24.41{{nbsp}}Gbit/s|| {{partial|DSC + 4:2:0}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|30||align="right"|30.60{{nbsp}}Gbit/s|| {{no}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|50||align="right"|51.47{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}} || {{yes}}
|-
|                                                     align="right"|60||align="right"|62.06{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{yes2|DSC}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes}}
|-
|                                                     align="right"|75||align="right"|78.13{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{partial|DSC + 4:2:0}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}} || {{yes2|DSC or 4:2:2}} || {{yes2|Yes{{efn|name=close_enough}}}}
|-
|                                                     align="right"|120||align="right"|127.75{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{yes2|DSC}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}}
|-
|                                                     align="right"|144||align="right"|155.11{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{partial|DSC + 4:2:2}} || {{yes2|DSC}} || {{yes2|DSC or 4:2:0}}
|-
|                                                     align="right"|240||align="right"|271.37{{nbsp}}Gbit/s|| {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes2|DSC}}
|-
! rowspan=2 colspan=4 |
! RBR
! HBR
! HBR2
! HBR3
! UHBR10
! UHBR13.5
! UHBR20
|-
! colspan=7 | Transmission mode
|}
{{noteslist}}

== Features ==

{| {{table}}
|-
! rowspan=2 | {{nbsp}}
! colspan=6 | DisplayPort version
|-
! style="min-width:80px" | 1.0 || style="min-width:80px" | 1.1–1.1a || style="min-width:80px" | 1.2–1.2a || style="min-width:80px" | 1.3 || style="min-width:80px" | 1.4–1.4a || style="min-width:80px" | 2.0
|-
| Hot-pluggable || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| Inline audio || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| DisplayPort content<br />protection (DPCP) || {{yes|DPCP{{nbsp}}1.0}}<ref name="DP 1.0" />{{rp|at=§1.2.6}} || {{yes|DPCP{{nbsp}}1.0}} || {{yes|DPCP{{nbsp}}1.0}} || {{yes|DPCP{{nbsp}}1.0}} || {{yes|DPCP{{nbsp}}1.0}} || {{yes|DPCP{{nbsp}}1.0}}
|-
| High-bandwidth digital<br />content protection ([[HDCP]]) || {{no}} || {{yes|HDCP{{nbsp}}1.3}}<ref name="DP 1.1a" />{{rp|at=§1.2.6}} || {{yes|HDCP{{nbsp}}1.3}}<ref name="DP 1.2" />{{rp|at=§1.2.6}} || {{yes|HDCP{{nbsp}}2.2}}<ref name="DP 1.3 press" /> || {{yes|HDCP{{nbsp}}2.2}} || {{yes|HDCP{{nbsp}}2.2}}
|-
| Dual-mode (DP++) || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| Maximum DP++ bandwidth<br />(TMDS Clock) || {{n/a}} || align=center | 4.95{{nbsp}}Gbit/s<br />(165{{nbsp}}MHz) || align=center | 9.00{{nbsp}}Gbit/s<br />(300{{nbsp}}MHz) || align=center | 18.00{{nbsp}}Gbit/s<br />(600{{nbsp}}MHz) || align=center | 18.00{{nbsp}}Gbit/s<br />(600{{nbsp}}MHz)  || align=center | 18.00{{nbsp}}Gbit/s<br />(600{{nbsp}}MHz)
|-
| Stereoscopic 3D video || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| Multi-stream transport (MST) || {{no}} || {{no}} || {{yes}} || {{yes}} || {{yes}} || {{yes}}
|-
| High-dynamic-range video (HDR) || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}} || {{yes}}
|-
| Display stream compression (DSC) || {{no}} || {{no}} || {{no}} || {{no}} || {{yes|DSC{{nbsp}}1.2{{nbsp}}(DP{{nbsp}}1.4)<br />DSC{{nbsp}}1.2a{{nbsp}}(DP{{nbsp}}1.4a)}} || {{yes|DSC{{nbsp}}1.2a}}
|-
| Panel replay || {{no}} || {{no}} || {{no}} || {{no}} || {{no}} || {{yes}}<ref name="DP 2.0 Anandtech" />
|}
{{notelist}}

=== {{anchor|Dual-mode}}{{anchor|DisplayPort++}} DisplayPort Dual-Mode (DP++) ===
{{more references|section|date=April 2022}}
[[File:DisplayPort plus plus.svg|thumb|left|upright=0.5|Dual-mode DisplayPort logo]]

{| class="wikitable floatright"
|+ Dual-mode pin mapping
! DisplayPort pins || DVI/HDMI mode
|-
| Main link lane 0 || TMDS channel 2
|-
| Main link lane 1 || TMDS channel 1
|-
| Main link lane 2 || TMDS channel 0
|-
| Main link lane 3 || TMDS clock
|-
| AUX CH+ || DDC clock
|-
| AUX CH− || DDC data
|-
| DP_PWR || DP_PWR
|-
| Hot-plug detect || Hot-plug detect
|-
| Config 1 || Cable adapter detect
|-
| Config 2 || [[Consumer Electronics Control|CEC]] ''(HDMI only)''
|}

'''DisplayPort Dual-Mode''' ('''DP++'''), also called '''Dual-Mode DisplayPort''', is a standard which allows DisplayPort sources to use simple passive adapters to connect to HDMI or DVI displays. Dual-mode is an optional feature, so not all DisplayPort sources necessarily support DVI/HDMI passive adapters, though in practice nearly all devices do. Officially, the "DP++" logo should be used to indicate a DP port that supports dual-mode, but most modern devices do not use the logo.<ref name="dual_mode_standard_1p1">{{citation
 | title = VESA DisplayPort Interoperability Guideline, Version 1.1
 | publisher = VESA
 | date = 28 January 2008
}}</ref>

Devices which implement dual-mode will detect that a DVI or HDMI adapter is attached, and send DVI/HDMI TMDS signals instead of DisplayPort signals. The original DisplayPort Dual-Mode standard (version 1.0), used in DisplayPort{{nbsp}}1.1 devices, only supported TMDS clock speeds of up to 165{{nbsp}}MHz (4.95{{nbsp}}Gbit/s bandwidth). This is equivalent to HDMI{{nbsp}}1.2, and is sufficient for up to {{resx|1920x1200}} at 60{{nbsp}}Hz.

In 2013, VESA released the Dual-Mode 1.1 standard, which added support for up to a 300{{nbsp}}MHz TMDS clock (9.00{{nbsp}}Gbit/s bandwidth), and is used in newer DisplayPort{{nbsp}}1.2 devices. This is slightly less than the 340{{nbsp}}MHz maximum of HDMI{{nbsp}}1.4, and is sufficient for up to {{resx|1920x1080}} at 120{{nbsp}}Hz, {{resx|2560x1440}} at 60{{nbsp}}Hz, or {{resx|3840x2160}} at 30{{nbsp}}Hz. Older adapters, which were only capable of the 165{{nbsp}}MHz speed, were retroactively termed "Type{{nbsp}}1" adapters, with the new 300{{nbsp}}MHz adapters being called "Type{{nbsp}}2".<ref>{{cite web |title=VESA Introduces Updated Dual-Mode Standard for Higher Resolution Interoperability with HDMI Displays |archive-url=https://web.archive.org/web/20180510051652/https://www.vesa.org/news/vesa-introduces-updated-dual-mode-standard-for-higher-resolution-interoperability-with-hdmi-displays/ |archive-date=10 May 2018 |url=http://www.vesa.org/featured-articles/vesa-introduces-updated-dual-mode-standard-for-higher-resolution-interoperability-with-hdmi-displays/ |publisher=VESA |date=31 January 2013 |access-date=13 May 2018}}</ref>

==== Dual-mode limitations ====
[[File:DP to DVI converter unmounted.jpg|thumb|A DisplayPort to DVI adapter after removing its enclosure. The chip on the board converts the voltage levels generated by the dual-mode DisplayPort device to be compatible with a DVI monitor. Despite the chip, this is often categorized as a passive adapter, as no significant protocol translation is taking place.]]

* '''Limited adapter speed'''{{Snd}}Although the pinout and digital signal values transmitted by the DP port are identical to a native DVI/HDMI TMDS source, the transmission lines on a DisplayPort source are AC-coupled (a series capacitor isolates the line from passing DC voltages) while DVI and HDMI TMDS are DC-coupled. As a result, dual-mode adapters must contain a level-shifting circuit which couples the signal lines to a DC source.<ref name="dual_mode_standard_1p1" />{{rp|at=§5.5}} The presence of this circuit places a limit on how quickly the adapter can operate, and therefore newer adapters are required for each higher speed added to the standard.
* '''Unidirectional'''{{Snd}}Although the dual-mode standard specifies a method for DisplayPort ''sources'' to output DVI/HDMI signals using simple passive adapters, there is no counterpart standard to give DisplayPort displays the ability to ''receive'' DVI/HDMI input signals through passive adapters. As a result, DisplayPort displays can only receive native DisplayPort signals; any DVI or HDMI input signals must be converted to the DisplayPort format with an active conversion device. DVI and HDMI sources cannot be connected to DisplayPort displays using passive adapters.
* '''Single-link DVI only'''{{Snd}}Since DisplayPort dual-mode operates by using the pins of the DisplayPort connector to send DVI/HDMI signals, the 20-pin DisplayPort connector can only produce a ''single-link'' DVI signal (which uses 19 pins). A ''dual-link DVI'' signal uses 25 pins, and is therefore impossible to transmit natively from a DisplayPort connector through a passive adapter. Dual-link DVI signals can only be produced by converting from native DisplayPort output signals with an active conversion device.
* '''Unavailable on USB-C'''{{Snd}}The ''DisplayPort Alternate Mode'' specification for sending DisplayPort signals over a [[USB-C]] cable does not include support for the dual-mode protocol. As a result, DP-to-DVI and DP-to-HDMI passive adapters do not function when chained from a USB-C to DP adapter.

=== Multi-Stream Transport (MST) {{Anchor|Multi-Stream Transport|MST|Multiple displays on single DisplayPort connector}} ===

'''Multi-Stream Transport''' is a feature first introduced in the DisplayPort{{nbsp}}1.2 standard. It allows multiple independent displays to be driven from a single DP port on the source devices by [[multiplexing]] several video streams into a single stream and sending it to a ''branch device'', which demultiplexes the signal into the original streams. Branch devices are commonly found in the form of an MST hub, which plugs into a single DP input port and provides multiple outputs, but it can also be implemented on a display internally to provide a DP output port for daisy-chaining, effectively embedding a 2-port MST hub inside the display.<ref name="DP 1.2" />{{rp|at=Fig. 2-59}}<ref>{{cite web|title=DisplayPortTM Ver.1.2 Overview |url=http://www.vesa.org/wp-content/uploads/2010/12/DisplayPort-DevCon-Presentation-DP-1.2-Dec-2010-rev-2b.pdf|access-date=5 July 2018}}</ref> Theoretically, up to 63 displays can be supported,<ref name="DP 1.2" />{{rp|page=20}} but the combined data rate requirements of all the displays cannot exceed the limits of a single DP port (17.28{{nbsp}}Gbit/s for a DP{{nbsp}}1.2 port, or 25.92{{nbsp}}Gbit/s for a DP 1.3/1.4 port). In addition, the maximum number of links between the source and any device (i.e. the maximum length of a daisy-chain) is 7,<ref name="DP 1.2" />{{rp|at=§2.5.2}} and the maximum number of physical output ports on each branch device (such as a hub) is 7.<ref name="DP 1.2" />{{rp|at=§2.5.1}} With the release of MST, standard single-display operation has been retroactively named "SST" mode (Single-Stream Transport).

Daisy-chaining is a feature that must be specifically supported by each intermediary display; not all DisplayPort{{nbsp}}1.2 devices support it. Daisy-chaining requires a dedicated DisplayPort ''output'' port on the display. Standard DisplayPort ''input'' ports found on most displays cannot be used as a daisy-chain output. Only the last display in the daisy-chain does not need to support the feature specifically or have a DP output port. DisplayPort{{nbsp}}1.1 displays can also be connected to MST hubs, and can be part of a DisplayPort daisy-chain if it is the last display in the chain.<ref name="DP 1.2" />{{rp|at=§2.5.1}}

The host system's software also needs to support MST for hubs or daisy-chains to work. While [[Microsoft Windows]] environments have full support for it, [[Apple Inc.|Apple]] operating systems currently do not support MST hubs or DisplayPort daisy-chaining as of macOS 10.15 ("Catalina").<ref>{{cite web |title=Does the 16-inch, 2019 MacBook Pro support daisy-chaining on DisplayPort? |url=https://discussions.apple.com/thread/251319707 |date=30 April 2020 }}</ref><ref>{{cite web |title=MacBook Pros and (their lack of) DisplayPort MST (Multi-Stream) support: what about macOS Catalina? |url=https://discussions.apple.com/thread/250785548 |date=17 December 2019}}</ref>
DisplayPort-to-DVI and DisplayPort-to-HDMI adapters/cables may or may not function from an MST output port; support for this depends on the specific device.{{Citation needed|reason=Needs a non-OR source (see talk page)|date=July 2018}}

MST is supported by USB Type-C DisplayPort Alternate Mode, so standard DisplayPort daisy-chains and MST hubs do function from Type-C sources with a simple Type-C to DisplayPort adapter.<ref>{{cite web | title=Google's USB Type-C to DP Adapter "DingDong" | url= https://www.chromium.org/chromium-os/dingdong | access-date = 2 August 2018}}</ref>

=== High dynamic range (HDR) ===
{{Main|High-dynamic-range television}}

Support for HDR video was introduced in DisplayPort{{nbsp}}1.4. It implements the CTA 861.3 standard for transport of static HDR metadata in EDID.<ref name="DP 1.4 press" />

=== Content protection {{anchor|Digital Rights Management (DRM)}} ===

DisplayPort{{nbsp}}1.0 includes optional ''DPCP'' (DisplayPort Content Protection) from [[Philips]], which uses 128-bit [[Advanced Encryption Standard|AES]] encryption. It also features full authentication and session key establishment. Each encryption session is independent, and it has an independent revocation system. This portion of the standard is licensed separately. It also adds the ability to verify the proximity of the receiver and transmitter, a technique intended to ensure users are not bypassing the content protection system to send data out to distant, unauthorized users.<ref name="DP 1.1a" />{{rp|at=§6}}

DisplayPort{{nbsp}}1.1 added optional implementation of industry-standard 56-bit HDCP ([[High-bandwidth Digital Content Protection]]) revision 1.3, which requires separate licensing from the Digital Content Protection LLC.<ref name="DP 1.1a" />{{rp|at=§1.2.6}}

DisplayPort{{nbsp}}1.3 added support for HDCP{{nbsp}}2.2, which is also used by HDMI{{nbsp}}2.0.<ref name="DP 1.3 press" />

== Cost ==

VESA, the creators of the DisplayPort standard, state that the standard is royalty-free to implement. However, in March 2015, [[MPEG LA]] issued a press release stating that a royalty rate of $0.20 per unit applies to DisplayPort products manufactured or sold in countries that are covered by one or more of the patents in the MPEG LA license pool, which includes patents from [[Hitachi Maxell]], [[Philips]], [[Lattice Semiconductor]], [[Rambus]], and [[Sony]].<ref name=DisplayPortMPEGLicenseMarch2015>{{cite news |title=MPEG LA Introduces License for DisplayPort |publisher=Business Wire |url=http://www.businesswire.com/news/home/20150305006071/en/MPEG-LA-Introduces-License-DisplayPort |date=5 March 2015 |access-date=5 March 2015}}</ref><ref name=MPEGLAPatents>{{cite web| title=DisplayPort Attachment 1| url=http://www.mpegla.com/main/programs/DisplayPort/Documents/displayport-att1.pdf| date=23 November 2015| access-date=23 November 2015| archive-url=https://web.archive.org/web/20180123190708/http://www.mpegla.com/main/programs/DisplayPort/Documents/displayport-att1.pdf| archive-date=23 January 2018| url-status=dead}}</ref> In response, VESA updated their DisplayPort FAQ page with the following statement:<ref name=DisplayPortFAQ>{{cite web|title=DisplayPort FAQ|url=http://www.displayport.org/faq/ |publisher=Video Electronics Standards Association (VESA)|access-date=23 November 2015 |archive-url=https://web.archive.org/web/20151113134810/http://www.displayport.org/faq/ |archive-date=13 November 2015}}</ref>
{{blockquote
|''MPEG LA is making claims that DisplayPort implementation requires a license and a royalty payment. It is important to note that these are only CLAIMS. Whether these CLAIMS are relevant will likely be decided in a US court.''
}}

As of August 2019, VESA's official FAQ no longer contains a statement mentioning the MPEG LA royalty fees.

While VESA does not charge any per-device royalty fees, VESA requires membership for access to said standards.<ref>{{cite web| title=VESA standards purchasing page | url=https://www.vesa.org/vesa-standards/}}</ref> The minimum cost is presently $5,000 (or $10,000 depending on Annual Corporate Sales Revenue) annually.<ref>{{cite web| title=VESA membership application | url=https://fs16.formsite.com/VESA/form70/index.html }}</ref>

== {{Anchor|Advantages over legacy standards}}Advantages over DVI, VGA and FPD-Link ==
{{Cleanup list|date=November 2010}}

In December 2010, several computer vendors and display makers including Intel, AMD, Dell, Lenovo, Samsung and LG announced they would begin phasing out [[FPD-Link]], [[VGA connector|VGA]], and [[DVI-I]] over the next few years, replacing them with DisplayPort and [[HDMI]].<ref name="technewsworld1">{{Cite journal | url = http://www.technewsworld.com/story/VGA-Given-5-Years-to-Live-71420.html | journal = Tech News World | title = VGA Given 5 Years to Live | first = Richard | last = Adhikari | date = 9 December 2010 }}</ref><ref>{{Cite journal | url = https://www.pcmag.com/article2/0,2817,2374034,00.asp?kc=PCRSS03069TX1K0001121 | title = Top PC, Chip, Display Makers to Ditch VGA, DVI | journal = PCMag }}</ref><ref>{{Cite web|date=2016-05-10|title=R.I.P. VGA: Nvidia's GeForce GTX 1080 dumps analog support, following Intel and AMD's lead|url=https://www.pcworld.com/article/3068397/rip-vga-nvidias-geforce-gtx-1080-dumps-analog-support-following-intel-and-amds-lead.html|access-date=2021-05-02|website=PCWorld|language=en}}</ref>

DisplayPort has several advantages over VGA, DVI, and FPD-Link.<ref>{{cite web |url=http://www.st.com/st-web-ui/static/active/en/resource/technical/document/technical_article/CD00271554.pdf |title=DisplayPort: the next generation interface for high-definition video and audio content |date=June 2010 |website=st.com |access-date=2014-07-15 |url-status=dead |archive-url=https://web.archive.org/web/20140719060349/http://www.st.com/st-web-ui/static/active/en/resource/technical/document/technical_article/CD00271554.pdf |archive-date=19 July 2014}}</ref>
* Standard available to all VESA members{{dubious|Open standard|date=March 2017}} with an extensible standard to help broad adoption<ref>{{Cite journal | url = http://www.vesa.org/vesa-standards/ | publisher = Vesa | title = Standards | access-date =2016-01-27}}</ref>
* Fewer lanes with embedded self-clock, reduced [[Electromagnetic interference|EMI]] with data scrambling and [[spread spectrum]] mode
* Based on a micro-packet protocol
** Allows easy expansion of the standard with multiple data types
** Flexible allocation of available bandwidth between audio and video
** Multiple video streams over single physical connection (version 1.2)
** Long-distance transmission over alternative physical media such as optical fiber (version 1.1a)
* High-resolution displays and multiple displays with a single connection, via a hub or daisy-chaining<ref>{{cite web|first=Niels|last=Broekhuijsen |url=http://www.tomshardware.com/news/evga-displayport-hub,25464.html |title=EVGA's DisplayPort Hub Available Now |website=[[Tom's Hardware]] |date=30 December 2013 |access-date=7 March 2014}}</ref>
** HBR2 mode with 17.28{{nbsp}}Gbit/s of effective video bandwidth allows four simultaneous 1080p60 displays (CEA-861 timings), two 2560 × 1600 × 30 bit @ 120{{nbsp}}Hz (CVT-R timings), or [[4K UHDTV|4K UHD]] @ 60{{nbsp}}Hz<ref group="note">Dual-link DVI is limited in resolution and speed by the quality and therefore the bandwidth of the DVI cable, the quality of the transmitter, and the quality of the receiver; can only drive one monitor at a time; and cannot send audio data. HDMI 1.3 and 1.4 are limited to effectively 8.16{{nbsp}}Gbit/s or 340{{nbsp}}MHz (though actual devices are limited to 225–300{{nbsp}}MHz{{Citation needed|date=January 2020}}), and can only drive one monitor at a time. [[VGA connector]]s have no defined maximum resolution or speed, but their analog nature limits their bandwidth, though can provide long cabling only limited by appropriate shielding.</ref>
** HBR3 mode with 25.92{{nbsp}}Gbit/s of effective video bandwidth, using CVT-R2 timings, allows eight simultaneous 1080p displays (1920 × 1080) @ 60{{nbsp}}Hz, [[stereoscopic]] [[4K UHDTV|4K UHD]] (3840 × 2160) @ 120{{nbsp}}Hz, or 5120 × 2880 @ 60{{nbsp}}Hz each using 24 bit RGB, and up to [[8K UHDTV|8K UHD]] (7680 × 4320) @ 60{{nbsp}}Hz using 4:2:0 subsampling<ref>{{cite web|url=http://www.heise.de/newsticker/meldung/VESA-veroeffentlicht-DisplayPort-1-3-2392134.html|title=VESA veröffentlicht DisplayPort 1.3|author=Moritz Förster|date=16 September 2014|work=heise online|access-date=27 January 2016}}</ref>
* Designed to work for internal chip-to-chip communication
** Aimed at replacing internal FPD-Link links to display panels with a unified link interface
** Compatible with low-voltage signaling used with [[90 nanometer|sub-micron]] [[CMOS]] fabrication
** Can drive display panels directly, eliminating scaling and control circuits and allowing for cheaper and slimmer displays
* Link training with adjustable amplitude and preemphasis adapts to differing cable lengths and signal quality
** Reduced bandwidth transmission for {{convert|15|m|ft|adj=mid}} cable, at least 1920 × 1080p @ 60{{nbsp}}Hz at 24 bits per pixel
** Full bandwidth transmission for {{convert|3|m|ft}}
* High-speed auxiliary channel for DDC, EDID, MCCS, DPMS, HDCP, adapter identification etc. traffic
** Can be used for transmitting bi-directional USB, touch-panel data, [[Consumer Electronics Control|CEC]], etc.
* Self-latching connector

== Comparison with HDMI ==
Although DisplayPort has much of the same functionality as [[HDMI]], it is a complementary connection used in different scenarios.<ref name="dpfaq">{{Cite news |title=FAQ Archive{{Snd}} DisplayPort |publisher=VESA |url=http://www.displayport.org/faq/faq-archive/ |access-date=22 August 2012}}</ref><ref name="Direct2Dell_DPvsHDMI">{{cite web|url=https://blog.dell.com/en-us/46464/|title=The Truth About DisplayPort vs. HDMI|work=dell.com|access-date=27 January 2016}}</ref> A [[#DisplayPort Dual-Mode (DP++)|dual-mode DisplayPort port]] can emit an HDMI signal via a passive adapter.

* As of 2008, [[HDMI Licensing, LLC]] charged an annual fee of US$10,000 to each high-volume manufacturer and a per-unit royalty rate of US$0.04 to US$0.15.<ref>{{Cite news|title=HDMI Adopter Terms|website=hdmi.org|publisher=HDMI Licensing|url=http://www.hdmi.org/manufacturer/terms.aspx|url-status=dead|access-date=23 June 2008|archive-url=https://web.archive.org/web/20081218170701/http://www.hdmi.org/manufacturer/terms.aspx|archive-date=18 December 2008}}</ref>{{Needs update|date=June 2019}} DisplayPort is royalty-free, but implementers thereof are not prevented from charging (royalty or otherwise) for that implementation.<ref>{{Cite news |title=Interview with Steve Venuti from HDMI Licensing |publisher=HDMI Licensing |url=http://www.hdmi.org/pdf/2009_10_Veritas_Visus_Venuti_Interview.pdf |website=hdmi.org |access-date=2016-01-27 |archive-date=21 June 2010 |archive-url=https://web.archive.org/web/20100621121203/http://www.hdmi.org/pdf/2009_10_Veritas_Visus_Venuti_Interview.pdf |url-status=dead }}</ref>
* DisplayPort 1.2 has more bandwidth at 21.6{{nbsp}}Gbit/s<ref>{{cite web | url = http://www.anandtech.com/show/4563/zotac-releases-displayport-to-dual-hdmi-adapter | title= Zotac releases DisplayPort to dual HDMI adapter | date = 2 August 2011 | publisher = Anandtech |access-date=23 January 2012}}</ref> (17.28{{nbsp}}Gbit/s with overhead removed) as opposed to HDMI 2.0's 18{{nbsp}}Gbit/s<ref>{{cite web |url=http://www.hdmi.org/manufacturer/hdmi_2_0/hdmi_2_0_faq.aspx |title=FAQ for HDMI 2.0 |publisher=HDMI |access-date=29 November 2013 |archive-date=5 January 2019 |archive-url=https://web.archive.org/web/20190105180631/https://www.hdmi.org/manufacturer/hdmi_2_0/hdmi_2_0_faq.aspx |url-status=dead }}</ref> (14.4{{nbsp}}Gbit/s with overhead removed). 
* DisplayPort 1.3 raises that to 32.4{{nbsp}}Gbit/s (25.92{{nbsp}}Gbit/s with overhead removed), and HDMI 2.1 raises that up to 48{{nbsp}}Gbit/s (42.67{{nbsp;}}Gbit/s with overhead removed), adding an additional TMDS link in place of clock lane. DisplayPort also has the ability to share this bandwidth with [[#Multiple displays on single DisplayPort connector|multiple streams]] of audio and video to separate devices.
* DisplayPort has historically had higher bandwidth than the HDMI standard available at the same time. The only exception is from HDMI 2.1 (2017) having higher transmission bandwidth @48{{nbsp}}Gbit/s than DisplayPort 1.3 (2014) @32.4{{nbsp}}Gbit/s. DisplayPort 2.0 (2019) retook transmission bandwidth superiority @80.0{{nbsp}}Gbit/s.
* DisplayPort in native mode lacks some HDMI features such as [[Consumer Electronics Control]] (CEC) commands. The CEC bus allows linking multiple sources with a single display and controlling any of these devices from any remote.<ref name="DP 1.1a" /><ref name="HDMI1.3a">{{cite news|url=http://www.microprocessor.org/HDMISpecification13a.pdf|title=HDMI Specification 1.3a|date=10 November 2006|publisher=HDMI Licensing, LLC|access-date=1 April 2016|archive-url=https://web.archive.org/web/20160305072940/http://www.microprocessor.org/HDMISpecification13a.pdf|archive-date=5 March 2016|url-status=dead}}</ref><ref>{{cite web|url=http://www.quantumdata.com/pdf/CEC_White_Paper.pdf|title=Designing CEC into your next HDMI Product|work=QuantumData.com|date=2008|access-date=24 July 2017|archive-date=4 March 2012|archive-url=https://web.archive.org/web/20120304040443/http://www.quantumdata.com/pdf/CEC_White_Paper.pdf|url-status=dead}}</ref> DisplayPort 1.3 added the possibility of transmitting [[Consumer Electronics Control|CEC]] commands over the AUX channel<ref>{{cite web|title=Linux drm: add support for DisplayPort CEC-Tunneling-over-AUX | url=https://patchwork.kernel.org/patch/10066347/ | author = Hans Verkuil | publisher = Cisco |
date = 20 November 2017 | access-date = 3 January 2018 }}</ref> From its very first version HDMI features CEC to support connecting ''multiple sources to a single display'' as is typical for a TV screen. The other way round, [[#Multiple displays on single DisplayPort connector|Multi-Stream Transport]] allows connecting ''multiple displays to a single computer source''. This reflects the facts that [[HDMI]] originated from ''consumer electronics'' companies whereas DisplayPort is owned by [[VESA]] which started as an organization for ''computer'' standards. 
* HDMI uses unique Vendor-Specific Block structure, which allows for features such as additional color spaces. However, these features can be defined by [[Extended Display Identification Data#CEA EDID Timing Extension data format - Version 3|CEA EDID extensions]].<ref>{{cite web|url=https://www.extron.com/article/uedid|title=Understanding EDID - Extended Display Identification Data|website=.extron.com}}</ref>
* Both HDMI and DisplayPort have published specification for transmitting their signal over the [[USB-C]] connector. For more details, see {{Section link|USB-C|Alternate Mode partner specifications}}.

== Market share ==
Figures from [[International Data Corporation|IDC]] show that 5.1% of commercial desktops and 2.1% of commercial notebooks released in 2009 featured DisplayPort.<ref name="technewsworld1"/> The main factor behind this was the phase-out of VGA, and that both Intel and AMD planned to stop building products with FPD-Link by 2013. Nearly 70% of LCD monitors sold in August 2014 in the US, UK, Germany, Japan, and China were equipped with HDMI/DisplayPort technology, up 7.5% on the year, according to Digitimes Research.<ref>{{cite web|url=http://www.digitimes.com/news/a20140901PD209.html|title=Digitimes Research: Proportion of HDMI/DisplayPort technology in LCD monitors increases 7.5pp in August|website=DIGITIMES|date=September 2014 }}</ref> IHS Markit, an analytics firm, forecast that DisplayPort would surpass [[HDMI]] in 2019.<ref>{{cite web|url=https://technology.ihs.com/599141/displayport-expected-to-surpass-hdmi-in-2019|title=DisplayPort expected to surpass HDMI in 2019 - IHS Technology|website=technology.ihs.com}}</ref>{{Needs update|date=March 2024}}

== Companion standards ==

=== Mini DisplayPort ===
{{Main|Mini DisplayPort}}
''Mini DisplayPort'' (mDP) is a standard announced by Apple in the fourth quarter of 2008. Shortly after announcing Mini DisplayPort, Apple announced that it would license the connector technology with no fee. The following year, in early 2009, VESA announced that Mini DisplayPort would be included in the upcoming DisplayPort 1.2 specification.
On 24 February 2011, Apple and Intel announced [[Thunderbolt (interface)|Thunderbolt]], a successor to Mini DisplayPort which adds support for [[PCI Express]] data connections while maintaining backwards compatibility with Mini DisplayPort based peripherals.<ref>{{cite press release |url=http://newsroom.intel.com/community/intel_newsroom/blog/2011/02/24/thunderbolt-technology-the-fastest-data-connection-to-your-pc-just-arrived |title=Thunderbolt Technology: The Fastest Data Connection to Your PC Just Arrived |publisher=Intel |date=24 February 2011 |access-date=24 February 2011}}</ref>

=== Micro DisplayPort ===
''Micro DisplayPort'' would have targeted systems that need ultra-compact connectors, such as phones, tablets and ultra-portable notebook computers. This standard would have been physically smaller than the currently available Mini DisplayPort connectors. The standard was expected to be released by Q2 2014.<ref>{{cite web|url=http://www.displayport.org/pr/vesa-begins-development-of-micro-displayport-connector-standard/ |title=VESA Begins Development of Micro-DisplayPort Connector Standard |publisher=DisplayPort |date=23 October 2013 |access-date=7 March 2014}}</ref>

=== DDM ===
''Direct Drive Monitor'' (DDM) 1.0 standard was approved in December 2008. It allows for controller-less monitors where the display panel is directly driven by the DisplayPort signal, although the available resolutions and color depth are limited to two-lane operation.

=== Display Stream Compression ===
{{Main|Display Stream Compression}}
''Display Stream Compression'' (DSC) is a [[Video Electronics Standards Association|VESA]]-developed video compression algorithm designed to enable increased display resolutions and frame rates over existing physical interfaces, and make devices smaller and lighter, with longer battery life.<ref name=DSC>{{cite press release |url=https://www.vesa.org/news/vesa-finalizes-requirements-for-display-stream-compression-standard/ |title=VESA Finalizes Requirements for Display Stream Compression Standard |publisher=VESA |date=24 January 2013 |access-date=20 March 2018 |archive-url=https://web.archive.org/web/20180321130439/https://www.vesa.org/news/vesa-finalizes-requirements-for-display-stream-compression-standard/ |archive-date=21 March 2018 |url-status=dead }}</ref>

=== eDP ===
<!-- [[Embedded DisplayPort]] redirects here. -->
''Embedded DisplayPort'' (eDP) is a display panel interface standard for portable and embedded devices. It defines the signaling interface between graphics cards and integrated displays. The various revisions of eDP are based on existing DisplayPort standards. However, version numbers between the two standards are not interchangeable. For instance, eDP version 1.4 is based on DisplayPort 1.2, while eDP version 1.4a is based on DisplayPort 1.3. Embedded DisplayPort has displaced [[Low-voltage differential signaling|LVDS]] as the predominant panel interface in modern laptops and modern smartphones. 

eDP 1.0 was adopted in December 2008.<ref name="eDP11a">{{cite web|url=http://www.vesa.org/wp-content/uploads/2010/12/PR22309eDP1_1a1.pdf |archive-url=https://web.archive.org/web/20120707045940/http://www.vesa.org/wp-content/uploads/2010/12/PR22309eDP1_1a1.pdf |url-status=dead |archive-date=7 July 2012 |title=Embedded DisplayPort Standard Ready from VESA |publisher=VESA |date=23 February 2009 }}</ref> It included advanced power-saving features such as seamless refresh rate switching. 
Version 1.1 was approved in October 2009 followed by version 1.1a in November 2009. 
Version 1.2 was approved in May 2010 and includes DisplayPort 1.2 HBR2 data rates, 120{{nbsp}}Hz [[sequential color]] monitors, and a new display panel control protocol that works through the AUX channel.<ref name= DevCon2010 /> 
Version 1.3 was published in February 2011; it includes a new optional Panel Self-Refresh (PSR) feature developed to save system power and further extend battery life in portable PC systems.<ref>{{Cite journal | url=http://www.businesswire.com/news/home/20110207005402/en/VESA-%C2%AE-Issues-Updated-Embedded-DisplayPort%C2%AE-Standard | title=VESA Issues Updated Embedded DisplayPort Standard | date=7 February 2011 | publisher=Business Wire | access-date=2016-01-27 }}</ref> PSR mode allows the GPU to enter a power saving state in between frame updates by including [[framebuffer]] memory in the display panel controller.<ref name = DevCon2010 /> 
Version 1.4 was released in February 2013; it reduces power consumption through partial-frame updates in PSR mode, regional backlight control, lower interface voltages, and additional link rates; the auxiliary channel supports multi-touch panel data to accommodate different form factors.<ref>{{cite web |url=http://www.vesa.org/featured-articles/vesa-improves-mobile-device-battery-life-and-display-performance-with-upcoming-release-of-embedded-displayport-edp-version-1-4/ |title=Mobile Battery Life and Display Performance Improves with Upcoming Release of eDP 1.4 |publisher=VESA |date=10 September 2012 |access-date=10 November 2013}}</ref> Version 1.4a was published in February 2015; the underlying DisplayPort version was updated to 1.3 in order to support HBR3 data rates, Display Stream Compression 1.1, Segmented Panel Displays, and partial updates for Panel Self-Refresh.<ref>{{cite web |url=http://www.vesa.org/featured-articles/vesa-publishes-embedded-displayport-edp-standard-version-1-4a/ |title=VESA Publishes Embedded DisplayPort (eDP) Standard Version 1.4a |publisher=VESA |date=9 February 2015 |access-date=27 January 2016 }}</ref> Version 1.4b was published in October 2015; its protocol refinements and clarifications are intended to enable adoption of eDP 1.4b in devices by mid-2016.<ref>{{cite web |url=http://www.vesa.org/featured-articles/vesa-rolls-out-production-ready-embedded-displayport-standard-1-4-for-mobile-personal-computing-devices/ |title=VESA Rolls Out Production-Ready Embedded DisplayPort Standard 1.4 for Mobile Personal Computing Devices |publisher=VESA |date=27 October 2015 |access-date=28 October 2015 }}</ref> Version 1.5 was published in October 2021; adds new features and protocols, including enhanced support for Adaptive-Sync, that provide additional power savings and improved gaming and media playback performance.<ref>{{cite web |url=https://vesa.org/featured-articles/vesa-publishes-embedded-displayport-standard-version-1-5/ | title=VESA Publishes Embedded DisplayPort Standard Version 1.5 |date=27 October 2021 |access-date=28 October 2021}}</ref>

=== iDP ===
''Internal DisplayPort'' (iDP) is a standard that defines an internal link between a digital TV [[system on a chip]] controller and the display panel's timing controller. Version 1.0 was approved in April 2010. It aims to replace currently used internal [[FPD-Link]] lanes with a DisplayPort connection.<ref name="iDP">{{cite web | url = http://www.displayport.org/cms/sites/default/files/downloads/press-releases/iDP_VESA_PR.pdf | title = VESA Issues Internal DisplayPort Standard for Flat Panel TVs | publisher = VESA | date = 10 May 2010 | archive-url = https://web.archive.org/web/20110726000532/http://www.displayport.org/cms/sites/default/files/downloads/press-releases/iDP_VESA_PR.pdf | archive-date = 26 July 2011}}</ref> iDP features a unique physical interface and protocols, which are not directly compatible with DisplayPort and are not applicable to external connection, however they enable very high resolution and refresh rates while providing simplicity and extensibility.<ref name = DevCon2010 /> iDP features a non-variable 2.7{{nbsp}}GHz clock and is nominally rated at 3.24{{nbsp}}Gbit/s per lane, with up to sixteen lanes in a ''bank'', resulting in a six-fold decrease in wiring requirements over FPD-Link for a 1080p24 signal; other data rates are also possible. iDP was built with simplicity in mind so doesn't have an AUX channel, content protection, or multiple streams; it does however have frame sequential and line interleaved stereo 3D.<ref name="DevCon2010" />

=== PDMI ===
''Portable Digital Media Interface'' ([[PDMI]]) is an interconnection between docking stations/display devices and portable media players, which includes 2-lane DisplayPort v1.1a connection. It has been ratified in February 2010 as [[ANSI]]/[[Consumer Electronics Association|CEA]]-2017-A.

=== wDP ===
''Wireless DisplayPort'' (''wDP'') enables the bandwidth and feature set of DisplayPort 1.2 for cable-free applications operating in the 60{{nbsp}}GHz radio band. It was announced in November 2010 by [[Wireless Gigabit Alliance|WiGig Alliance]] and VESA as a cooperative effort.<ref>{{Cite journal | url = http://wirelessgigabitalliance.org/news/wigig%E2%84%A2-alliance-and-vesa%C2%AE-to-collaborate-on-next-generation-wireless-displayport/ | publisher = Wireless Gigabit Alliance | title = WiGig Alliance and VESA to Collaborate on Next Generation Wireless DisplayPort}}</ref>

=== SlimPort ===
[[File:A SlimPort-to-HDMI adapter, made by Analogix.jpg|thumb|right|A SlimPort-to-HDMI adapter, made by Analogix]]

''SlimPort'', a brand of [[Analogix]] products,<ref>{{cite web |title=VESA Experiences Acceleration of MyDP Standard Adoption in Mobile Devices |url=http://www.vesa.org/news/vesa-experiences-acceleration-of-mydp-standard-adoption-in-mobile-devices/ |access-date=10 March 2014 |archive-url=https://web.archive.org/web/20160322100508/http://www.vesa.org/news/vesa-experiences-acceleration-of-mydp-standard-adoption-in-mobile-devices/ |archive-date=22 March 2016 |url-status=dead }}</ref> complies with ''Mobility DisplayPort'', also known as ''MyDP'', which is an industry standard for a mobile audio/video Interface, providing connectivity from mobile devices to external displays and HDTVs. SlimPort implements the transmission of video up to 4K-UltraHD and up to eight channels of audio over the [[micro-USB]] connector to an external converter accessory or display device. SlimPort products support seamless connectivity to DisplayPort, HDMI and VGA displays.<ref>{{cite web |url=http://us.slimportconnect.com/support/ |title=Support{{Snd}} Slimport |publisher=Us.slimportconnect.com |date=18 July 2013 |access-date=11 March 2014 |archive-date=23 March 2016 |archive-url=https://web.archive.org/web/20160323034546/http://us.slimportconnect.com/support/ |url-status=dead }}</ref> The MyDP standard was released in June 2012,<ref>{{cite web |url=http://www.vesa.org/news/vesa-enables-mobile-devices-to-share-full-hd-video-and-3d-content-on-any-display-with-release-of-mydp-standard/ |title=Releases MyDP Standard |publisher=VESA |date=27 June 2012 |access-date=10 November 2013 |archive-url=https://web.archive.org/web/20160317100300/http://www.vesa.org/news/vesa-enables-mobile-devices-to-share-full-hd-video-and-3d-content-on-any-display-with-release-of-mydp-standard/ |archive-date=17 March 2016 |url-status=dead }}</ref> and the first product to use SlimPort was [[Google]]'s [[Nexus 4]] smartphone.<ref>{{cite web |url=http://www.vesa.org/featured-articles/vesa-experiences-acceleration-of-mydp-standard-adoption-in-mobile-devices/ |title=Experiences Acceleration of MyDP Standard Adoption in Mobile Devices |publisher=VESA |date=9 November 2012 |access-date=10 November 2013}}</ref> Some LG smartphones in [[LG G series]] also adopted SlimPort.

SlimPort is an alternative to [[Mobile High-Definition Link]] (MHL).<ref>{{cite web |title=Hands on with the Analogix SlimPort microUSB to HDMI and VGA adapters |url=http://www.anandtech.com/show/6499/hands-on-with-the-analogix-slimport-microusb-to-hdmi-and-vga-adapters |work=AnandTech |access-date=31 December 2013}}</ref><ref>{{cite web |title=SlimPort |url=http://www.slimportconnect.com/ |access-date=31 December 2013 |archive-date=9 April 2016 |archive-url=https://web.archive.org/web/20160409182906/http://www.slimportconnect.com/ |url-status=dead }}</ref>

=== DisplayID ===
{{Main|DisplayID}}
''DisplayID'' is designed to replace the [[Extended display identification data|E-EDID]] standard. DisplayID features variable-length structures which encompass all existing [[EDID]] extensions as well as new extensions for [[3D displays]] and embedded displays.

The latest version 1.3 (announced on 23 September 2013) adds enhanced support for tiled display topologies; it allows better identification of multiple video streams, and reports bezel size and locations.<ref>{{cite web | url = http://www.vesa.org/news/vesa-refreshes-displayid-standard-to-support-higher-resolutions-and-tiled-displays/ | title = VESA Refreshes DisplayID Standard to Support Higher Resolutions and Tiled Displays | date = 23 September 2013 | access-date = 24 December 2013 | publisher = vesa.org | archive-url = https://web.archive.org/web/20150208120440/http://www.vesa.org/news/vesa-refreshes-displayid-standard-to-support-higher-resolutions-and-tiled-displays/ | archive-date = 8 February 2015 | url-status = dead }}</ref> As of December 2013, many current 4K displays use a tiled topology, but lack a standard way to report to the video source which tile is left and which is right. These early 4K displays, for manufacturing reasons, typically use two 1920×2160 panels laminated together and are currently generally treated as multiple-monitor setups.<ref>{{cite web | url = http://www.tomshardware.com/reviews/pq321q-4k-gaming,3620.html | title = Gaming At 3840x2160: Is Your PC Ready For A 4K Display? | date = 19 September 2013 | access-date = 26 December 2013 | publisher = tomshardware.com}}</ref> DisplayID 1.3 also allows 8K display discovery, and has applications in stereo 3D, where multiple video streams are used.

=== DockPort ===
{{Main|DockPort}}
''DockPort'', formerly known as ''Lightning Bolt'', is an extension to DisplayPort to include [[USB 3.0]] data as well as power for charging portable devices from attached external displays. Originally developed by AMD and Texas Instruments, it has been announced as a VESA specification in 2014.<ref>{{cite web | url=http://www.anandtech.com/show/7649/dockport-adopted-as-official-extension-to-displayport-standard | title=MD/TI's DockPort Adopted As Official Extension to DisplayPort Standard | access-date = 12 January 2014 | publisher = anandtech.com}}</ref>

=== USB-C ===
{{main|USB-C}}
On 22 September 2014, VESA published the ''DisplayPort Alternate Mode on USB Type-C Connector Standard'', a specification on how to send DisplayPort signals over the newly released [[USB-C]] connector. One, two or all four of the differential pairs that USB uses for the SuperSpeed bus can be configured dynamically to be used for DisplayPort lanes. In the first two cases, the connector still can carry a full SuperSpeed signal; in the latter case, at least a non-SuperSpeed signal is available. The DisplayPort AUX channel is also supported over the two sideband signals over the same connection; furthermore, [[USB Power Delivery]] according to the newly expanded USB-PD 2.0 specification is possible at the same time. This makes the Type-C connector a strict superset of the use cases envisioned for DockPort, SlimPort, and Mini and Micro DisplayPort.<ref>{{cite web | url=http://www.anandtech.com/show/8558/displayport-alternate-mode-for-usb-typec-announced | title=DisplayPort Alternate Mode for USB Type-C Announced{{Snd}} Video, Power, & Data All Over Type-D | access-date = 14 October 2014 | publisher = anandtech.com}}</ref>

=== VirtualLink ===
{{main|VirtualLink}}
''VirtualLink'' is a proposal that allows the power, video, and data required to drive virtual reality headsets to be delivered over a single USB-C cable.

== Products ==
[[File:Lenovo x220 dp crop.jpg|thumb|A [[#Dual-mode|Dual-mode]] DisplayPort connector]]
Since DisplayPort's introduction in 2006, it has gained popularity within the computer industry and is featured on many graphics cards, displays, and notebook computers. Dell was the first company to introduce a consumer product with a DisplayPort connector, the Dell UltraSharp 3008WFP, which was released in January 2008.<ref>{{cite news |url=https://www.washingtonpost.com/wp-dyn/content/article/2008/01/03/AR2008010301753_pf.html |title=Dell UltraSharp 3008WFP 30-Inch LCD Monitor |access-date=25 June 2008 | newspaper=The Washington Post}}</ref> Soon after, [[Advanced Micro Devices|AMD]] and [[Nvidia]] released products to support the technology. AMD included support in the [[Radeon R600|Radeon HD 3000]] series of graphics cards, and Nvidia first introduced support in the [[GeForce 9 series]] starting with the GeForce 9600 GT.<ref>{{cite news |url= https://www.amd.com/us/press-releases/Pages/Press_Release_124353.aspx | title= AMD Receives First Ever DisplayPort Certification for PC Graphics |date= 19 March 2008 |publisher= AMD | access-date = 23 January 2012}}</ref><ref name="GeForce 9600 GT">{{cite web |url=http://www.legitreviews.com/article/666/3/ |title=EVGA, Palit and XFX GeForce 9600 GT Video Card Review |last=Kirsch |first=Nathan |date=21 February 2008 |publisher=Legit Reviews |access-date=2 April 2013}}</ref>

[[File:Mini DisplayPort on Apple MacBook.jpg|thumb|left|A Mini DisplayPort connector]]
Later in 2008, Apple introduced several products featuring a Mini DisplayPort.<ref>{{cite web | title = Software Licensing and Trademark Agreement: Mini DisplayPort | url = https://developer.apple.com/softwarelicensing/agreements/minidisplayport.html}}</ref> The new connector{{Snd}}proprietary at the time{{Snd}}eventually became part of the DisplayPort standard, however Apple reserves the right to void the license should the licensee "commence an action for patent infringement against Apple".<ref>{{cite news |title=Apple Mini DisplayPort Connector Implementation License Checklist |publisher=Apple |url=https://developer.apple.com/softwarelicensing/agreements/pdf/MiniDisplayPortImpLicense.pdf |access-date=4 December 2008}}</ref> In 2009, AMD followed suit with their [[Radeon HD 5000 series]] of graphics cards, which featured the Mini DisplayPort on the ''Eyefinity'' versions in the series.<ref>{{cite web |date=23 September 2009 |url= http://www.pcper.com/article.php?aid=783&type=expert&pid=4 |title=ATI Radeon HD 5870 1GB Graphics Card and AMD Eyefinity Review |publisher=PC Perspective |access-date=23 September 2009|archive-url=https://web.archive.org/web/20090927152239/http://www.pcper.com/article.php?aid=783&type=expert&pid=4|archive-date=27 September 2009}}</ref>

Nvidia launched a graphics card with 8 Mini DisplayPort outputs on 4 November 2015, called the NVS 810, which was intended for digital signage.<ref>{{cite web|url=https://blogs.nvidia.com/blog/2015/11/04/digital-signage-nvs-810/|title=Signs of the Times: Massive Digital Signage Displays Powered by Diminutive Graphics Card|work=The Official NVIDIA Blog|access-date=2024-03-01|archive-url=https://web.archive.org/web/20151106032846if_/http://blogs.nvidia.com/blog/2015/11/04/digital-signage-nvs-810|archive-date=2015-11-06}}</ref><ref>{{Cite web |last=Williams |first=Daniel |title=NVIDIA Launches NVS 810 Digital Signage Video Card |url=https://www.anandtech.com/show/9760/nvidia-launches-nvs-810-digital-signage-video-card |access-date=2024-03-01 |website=www.anandtech.com|archive-url=https://web.archive.org/web/20151105191242if_/http://www.anandtech.com/show/9760/nvidia-launches-nvs-810-digital-signage-video-card|archive-date=2015-11-05}}</ref>
{{clear}}

Nvidia revealed the [[GeForce GTX 1080]], the world's first graphics card with DisplayPort 1.4 support on 6 May 2016.<ref>{{Cite web|url=https://www.nvidia.com/en-us/geforce/10-series/|title=NVIDIA GeForce 10 Series Graphics Cards|website=NVIDIA}}</ref> AMD followed with the Radeon RX 480 to support DisplayPort 1.3/1.4 on 29 June 2016.<ref>{{cite web|url=https://www.amd.com/de/products/graphics/radeon-rx-480|title=Radeon RX 480-Grafikkarten{{Snd}} AMD|website=www.amd.com}}</ref> The [[List of AMD graphics processing units#Radeon RX 400 series|Radeon RX 400 series]] will support DisplayPort 1.3 HBR and HDR10, dropping the DVI connector(s) in the reference board design.

In February 2017, VESA and Qualcomm announced that DisplayPort Alt Mode video transport will be integrated into the [[Qualcomm Snapdragon|Snapdragon]] 835 mobile chipset, which powers smartphones, VR/AR head-mounted displays, IP cameras, tablets and mobile PCs.<ref>{{Cite web|url=https://vesa.org/featured-articles/vesa-highlights-growing-displayport-alt-mode-adoption-and-latest-displayport-developments-at-mobile-world-congress/|title=VESA Highlights Growing DisplayPort Alt Mode Adoption and Latest DisplayPort Developments at Mobile World Congress|date=15 February 2017|website=VESA - Interface Standards for The Display Industry}}</ref>

=== Support for DisplayPort Alternate Mode over USB-C ===
{{see also|USB-C#Hardware support}}
[[File:Samsung DeX dock with S8, plugged into monitor.jpg|thumb|A Samsung Galaxy S8 plugged into a DeX docking station]]

Currently, DisplayPort is the most widely implemented alternate mode, and is used to provide video output on devices that do not have standard-size DisplayPort or HDMI ports, such as smartphones, tablets, and laptops. A USB-C multiport adapter converts the device's native video stream to DisplayPort/HDMI/VGA, allowing it to be displayed on an external display, such as a television set or computer monitor.

Examples of devices that support DisplayPort Alternate Mode over USB-C include: [[MacBook (12-inch)|MacBook]], [[Chromebook Pixel]], [[Surface Book 2]], [[Samsung Galaxy Tab S4]], [[iPad Pro (3rd generation)]], [[iPhone 15]]/[[iPhone 15 Pro|15 Pro]], [[HTC 10]]/[[HTC U Ultra|U Ultra]]/[[HTC U11|U11]]/[[HTC U12+|U12+]], [[Huawei Mate 10]]/[[Huawei Mate 20|20]]/[[Huawei Mate 30|30]], [[LG V20]]/[[LG V30|V30]]/[[LG V40|V40]]*/[[LG V50|V50]], [[OnePlus 7]] and newer, [[ROG Phone]], [[Samsung Galaxy S8]] and newer, [[Nintendo Switch]], [[Sony Xperia 1]]/[[Sony Xperia 5|5]] etc.<ref>{{Cite web|url=http://phonedb.net/index.php?m=device&s=query&d=detailed_specs&av_out_type=163#result|title=Search &#124; Device Specs &#124; PhoneDB - The Largest Phone Specs Database|website=phonedb.net}}</ref><ref>{{Cite web|url=https://www.slimportconnect.com/Interoperability/|title=SlimPort|website=www.slimportconnect.com}}</ref>

== Participating companies{{Anchor|Supporters}}<!--Supporters linked form HDMI--> ==
The following companies have participated in preparing the drafts of DisplayPort, eDP, iDP, DDM or DSC standards:
{{Div col|colwidth=18em}}
* [[Agilent Technologies|Agilent]]
* [[Altera Corporation|Altera]]
* [[AMD Graphics Product Group]]
* [[Analogix]]<ref>{{cite web|url=http://www.prnewswire.com/news-releases/analogix-delivers-industrys-first-displayporttm-transmitter-ic-to-also-support-legacy-dvi-to-hdmi-displays-56263647.html |title=Analogix announces DisplayPort transmitter |date=26 August 2006 |access-date=10 August 2009|url-status=dead |archive-url=https://web.archive.org/web/20130624223749/http://www.prnewswire.com/news-releases/analogix-delivers-industrys-first-displayporttm-transmitter-ic-to-also-support-legacy-dvi-to-hdmi-displays-56263647.html |archive-date=24 June 2013}}.</ref>
* [[Apple Inc.|Apple]]
* [[Astrodesign]]
* [[BenQ]]
* [[Broadcom|Broadcom Corporation]]
* [[Chi Mei Optoelectronics]]
* [[Chrontel]]<ref>{{cite web | url = http://www.chrontel.com/ | title = Chrontel }}</ref>
* [[Dell]]
* [[Display Labs]]
* [[Foxconn|Foxconn Electronics]]
* [[FuturePlus Systems]]
* [[Genesis Microchip]]<ref>{{cite web |date=2 May 2006 |url= http://seekingalpha.com/article/9956 |title= Genesis Microchip (GNSS) Q4 2006 Earnings Conference Call | publisher=Seeking Alpha |access-date=16 July 2007}}</ref>
* [[Gigabyte Technology]]
* [[Hardent]]
* [[Hewlett-Packard]]
* [[Hosiden]]
* [[Hirose Electric Group]]
* [[Intel Corporation|Intel]]
* [[intoPIX]]
* [[I-PEX]]
* [[Integrated Device Technology]]
* [[Japan Aviation Electronics|JAE Electronics]]
* [[Kawasaki Heavy Industries|Kawasaki Microelectronics (K-Micro)]]
* [[Keysight Technologies]]
* [[Lenovo]]
* [[LG Display]]
* [[Luxtera]]
* [[Molex]]
* [[NEC]]
* [[NVIDIA]]
* [[NXP Semiconductors]]
* [[Xi3 Corporation]]
* [[Parade Technologies]]
* [[Realtek|Realtek Semiconductor]]
* [[Samsung Electronics|Samsung]]<ref>{{cite web |date=25 July 2006 |url=http://www.tgdaily.com/content/view/33064/135/ |title=Samsung touts development of first DisplayPort desktop LCD |publisher=TG Daily |access-date=25 July 2007 |url-status=dead |archive-url=https://web.archive.org/web/20070926232615/http://www.tgdaily.com/content/view/33064/135/ |archive-date=26 September 2007}}</ref>
* SMK
* [[STMicroelectronics]]
* [[Synaptics Inc.]]
* [[SyntheSys Research Inc.]]
* [[Teledyne LeCroy (QuantumData)]]
* [[Tektronix]]
* [[Texas Instruments]]
* [[Technology Leaders & Innovators|TLi]]
* [[Tyco Electronics]]
* [[ViewSonic]]
* VTM
{{div col end}}

'''The following companies have additionally announced their intention to implement DisplayPort, eDP or iDP''':
{{Div col|colwidth=18em}}
* [[Acer Inc.|Acer]]
* [[ASRock]]<ref>{{cite web|url=http://www.asrock.com/news/show.asp?id=119|title=Worldwide First DisplayPort MB|date=25 March 2008|access-date=10 August 2009|archive-url=https://web.archive.org/web/20090115205813/http://www.asrock.com/news/show.asp?id=119|archive-date=15 January 2009}}</ref>
* [[Biostar]]
* Chroma
* [[BlackBerry Ltd.|BlackBerry]]
* [[Circuit Assembly]]
* DataPro<ref>{{ cite web | url=http://www.datapro.net/catalog/displayport-cables.html | title=DataPro DisplayPort Cables }}</ref>
* [[Eizo]]
* [[Fujitsu]]
* [[Hall Research Technologies]]
* [[ITE Tech. Inc.|ITE Tech.]]
* [[Matrox Graphics]]
* [[Micro-Star International]]<ref>{{cite web|url=http://ca.msi.com/index.php?func=newsdesc&news_no=578 |title=MSI announces video adaptor with DisplayPort |date=17 January 2008 |access-date=10 August 2009 |url-status=dead |archive-url=https://web.archive.org/web/20131219021343/http://ca.msi.com/index.php?func=newsdesc&news_no=578 |archive-date=19 December 2013 }}</ref>
* MStar Semiconductor
* Novatek Microelectronics Corp.
* [[Palit Microsystems Ltd.]]
* [[Pioneer Corporation]]
* [[S3 Graphics]]
* [[Toshiba]]
* [[Philips]]
* [[Quantum Data]]
* [[Sparkle Computer]]
* [[Unigraf]]
* [[Xitrix]]
{{div col end}}

== See also ==
* [[HDBaseT]]
* [[HDMI]]
* [[List of video connectors]]
* [[Thunderbolt (interface)]]

== Notes ==
{{Reflist|colwidth=60em|group="note"}}

== References ==
{{Reflist}}

== External links ==
<!-- Note please read [[WP:EL]] before putting links here. -->
* {{official website|name=DisplayPort}}{{Snd}}the official site operated by VESA

{{AVconn}}
{{Audio and video interfaces and connectors}}
{{Basic computer components}}
{{Digital audio and video protocols}}
{{authority control}}

{{DEFAULTSORT:Displayport}}
[[Category:Digital display connectors]]
[[Category:VESA]]
[[Category:Computer connectors]]
[[Category:Serial buses]]