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Display Data Channel

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The Display Data Channel or DDC is a collection of digital communication protocols between a computer display and a graphics adapter which allows the display to communicate its supported display modes to the adapter and adjust monitor parameters such as brightness and contrast from the computer host.

The standard was created by the Video Electronics Standards Association (VESA).

Overview

The DDC suite of standards aims to provide a "plug and play" experience for computer displays.

DDC1 and DDC2B/Ab/B+/Bi protocols are a physical link between a monitor and a video card, which was originally carried on either two or three pins in a 15-pin analog VGA connector.

Extended display identification data (EDID) is a companion standard; it defines a compact binary file format describing the monitor's capabilities and supported graphics modes, stored in a read-only memory (EEPROM) chip programmed by the manufacturer of the monitor. The format uses a description block containing 128 bytes of data, with optional extension blocks to provide additional information. The most current version is Enhanced EDID (E-EDID) Release A, v2.0.

The first version of the DDC standard was adopted in August 1994. It included the EDID 1.0 format and specified DDC1, DDC2B and DDC2Ab physical links.

DDC version 2, introduced in April 1996, split EDID into a separate standard and introduced the DDC2B+ protocol.

DDC version 3, December 1997, introduced the DDC2Bi protocol and support for VESA Plug and Display and Flat Panel Display Interface on separate device addresses, requiring them to comply with EDID 2.0.

The DDC standard has been superseded by E-DDC in 1999.

Prior to the DDC, the VGA standard had reserved four pins, known as ID0, ID1, ID2 and ID3 (pins 11, 12, 4 and 15) for identification of monitor type. The first three ID pins, attached to resistors to pull one or more of them to ground (GND), allowed for the definition of up to seven monitor types, with all open (floating or NC, No Connection) - meaning "no monitor". However, only three types of monitor were defined - monochrome with a resolution of less than 1024×768 (NC, NC, GND), color with a resolution of less than 1024×768 (NC, GND, NC), and color with 1024×768 (GND, GND, NC). Pin ID3 was unused. DDC changed the purpose of these pins to incorporate a serial link interface.

DDC1

DDC1 is a simple, low-speed, unidirectional serial link protocol. Pin 12, ID1 functions as a data line that continuously transmits the 128-byte EDID block, and the data clock is synchronised with vertical sync, providing typical clock rates of 60 to 100 Hz.

Very few display devices implemented this protocol.

DDC2

The most common version, called DDC2B, is based on I²C, a serial bus. Pin 12, ID1 is now used as the data pin from the I²C bus, and the formerly-unused pin 15 became the I²C clock; pin 9, previously used as a mechanical key, supplied +5V DC power up to 50mA to drive the EEPROM, this allows the host to read the EDID even if the monitor is powered off. Though I²C is fully bidirectional and supports multiple bus-masters, DDC2B is unidirectional and allows only one bus master - the graphics adapter. And the monitor acts as the slave device at I²C address A1h (7-bit I²C address 50h, read-only, so A1h) providing the 128 bytes to 256 bytes EDID.

DDC2Ab is an implementation of the I²C-based 100 kbit/s ACCESS.bus interface, which allowed monitor manufacturers to support external ACCESS.bus peripherals such as a mouse or keyboard with little to no additional effort; such devices and monitors were briefly available in the mid 1990s, but disappeared with the introduction of USB.

DDC2B+ and DDC2Bi are scaled-down versions of DDC2Ab which only support monitor and graphics card devices but still allow bidirectional communication between them.

Both DVI and HDMI connectors feature dedicated DDC2B wires.

DDC/CI

DDC/CI (Command Interface) specifies a means for a computer to send commands to the monitor, as well as receive sensor data from the monitor, over a bidirectional link. Specific commands to control monitors are defined in a separate Monitor Control Command Set (MCCS) standard.

DDC/CI monitors are sometimes supplied with an external color sensor to allow automatic calibration of the monitor's color balance. Some tilting DDC/CI monitors support an auto-pivot function, where a rotation sensor in the monitor enables the operating system to keep the display upright as the monitor is moved between its portrait and landscape positions.

DDC/CI standard was introduced in August 1998. It described a full suite of bidirectional control protocols - DDC2Ab, DDC2Bi and DDC2B+ - in a single standard and provided a means for packaging Monitor Control Command Set commands. This release coincided with the MCCS 1.0 standard.

DDC/CI version 1.1 was adopted in October 2004[1].

Monitor Control Command Set Standard v2.0 was adopted in October 2003. A new MCCS V3 was introduced in July 2006, though didn't gain enough industry attention as of yet. The latest release of V2 standard is version 2.2, adopted February 2009.

E-DDC

Enhanced Display Data Channel (E-DDC) is the most recent revision of the DDC standard. Version 1 was introduced in September 1999 and featured the addition of a segment pointer which allowed up to 32 Kbytes of display information storage for use by the Enhanced EDID (E-EDID) standard.

Earlier DDC implementations used simple 8-bit data offset when communicating with the memory at I²C address A1h (7-bit address 50h, read-only, so A1h) in the monitor, limiting the storage size to 28 bytes = 256 bytes, but allowing the use of cheap 2-Kbit EEPROMs. In E-DDC, a special I²C addressing scheme involves a single 8-bit segment index which is passed to the display via the new I²C address 60h (7-bit address 30h, write-only, so 60h). Data from the selected segment is then immediately read via the regular DDC2 address at A1h using a repeated I²C 'START' signal. However, VESA specification defines the segment index value range as 00h to 7Fh, so this only allows addressing 128 segments * 256 bytes = 32KB. The segment index register at 60h is volatile, defaulting to zero and automatically resets to zero after each NACK or STOP, therefore it should be set every time access to data above the first 256-byte segment is performed. The auto-reset mechanism is to provide for backward compatibility to, for example, DDC2B hosts, otherwise they may be stuck at a segment other than 00h in some rare cases.

Other important changes were removal of the DDC1 and DDC2Ab protocols, deprecation of separate VESA P&D and FPDI device addresses, and clarifications to the DDC power requirements.

E-DDC Version 1.1, approved March 2004, featured support for HDMI and consumer electronics.

E-DDC Version 1.2, approved December 2007, introduced support for DisplayPort (which has no dedicted DDC2B links and uses its bidirectional auxiliary channel for EDID and MCCS communication) and DisplayID standards.

Disabling DDC

Some KVM switches (keyboard-video-mouse) and video extenders handle DDC traffic incorrectly, making it necessary to disable monitor plug and play features in the operating system, and maybe even physically remove pin 12 from the analog VGA cables that connects such device to multiple PCs.

Microsoft Windows features a standard "Plug and Play Monitor" driver which uses the display's EDID information to construct a list of supported monitor modes. The Display Resolution control panel applet allows the user to disable this driver's Plug and Play features and manually select any resolution or refresh rate supported by the video card.[2] Many video card manufacturers and third parties provide control applications which allow the user to select a custom display mode that does not conform to the EDID information or the monitor .INF file.

References

  • Extended Display Identification Data (EDID) Standard, Version 3, 1997, VESA
  • VESA Standards FAQ
  • Display interfaces: fundamentals. Bob Myers, Robert L. Myers, Society for Information Display