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=== MIPS-X Programmer's Manual===
=== MIPS-X Programmer's Manual===
The [[MIPS-X]] was a processor supported by the [[Defense Advanced Research Projects Agency]]. The Programmer's Manual for this chip describes an HSC (Halt and Spontaneously Combust) instruction, that is only found in a version of the processor designed for the [[National Security Agency]].<ref>{{cite web|url=ftp://reports.stanford.edu/pub/cstr/reports/csl/tr/86/289/CSL-TR-86-289.pdf | title=MIPS-X Instruction Set and Programmer's Manual | last = Chow | first=Paul | date = May 1988 | accessdate = 2010-07-08 | place=Stanford, California, United States of America | publisher = Computer Systems Laboratory, Departments of Electrical Engineering and Computer Science, Stanford University}}</ref> The manual entry is a joke, and does not describe a genuine feature of the CPU.{{Citation needed|date=July 2010}}
The [[MIPS-X]] was a processor supported by the [[Defense Advanced Research Projects Agency]]. The Programmer's Manual for this chip describes an HSC (Halt and Spontaneously Combust) instruction, that is only found in a version of the processor designed for the [[National Security Agency]].<ref>{{cite web|url=ftp://reports.stanford.edu/pub/cstr/reports/csl/tr/86/289/CSL-TR-86-289.pdf | title=MIPS-X Instruction Set and Programmer's Manual | last = Chow | first=Paul | date = May 1988 | accessdate = 2010-07-08 | place=Stanford, California, United States of America | publisher = Computer Systems Laboratory, Departments of Electrical Engineering and Computer Science, Stanford University}}</ref> The manual entry is a joke, and does not describe a genuine feature of the CPU.{{Citation needed|date=July 2010}}

==In modern GPUs==
===NVIDIA GTX480===
While not a true Halt and Catch Fire instruction, installing NVIDIA's 196.75 drivers on the system cause the GTX480 to overheat and occasionally begin to smoke or catch fire. On many occasions, this has led to house fires destroying the house the card was used in and even killing your family with burning woodscrews.


==See also==
==See also==

Revision as of 03:46, 1 November 2010

Halt and Catch Fire, known by the mnemonic HCF, refers to several computer machine code instructions that cause the CPU to cease meaningful operation. The expression "catch fire" is usually intended as a joke; in most cases the CPU does not actually catch fire.

In early CPUs

The HCF instruction was originally a fictitious instruction, claimed to be under development at IBM for use in their System/360 computers, along with many other amusing instructions such as "Execute Operator".

One apocryphal story about the HCF instruction goes back to the late 1960s, when computers used magnetic core memory. The story goes that in order to speed up the core memory on their next model the engineers increased the read/write currents in the very fine wires that were threaded through the cores. This worked fine when the computer was executing normal programs, since memory accesses were spread throughout memory. However, the HALT instruction was implemented as a "Jump to self". This meant that the same core memory location was repeatedly accessed, and the very fine wires became so hot that they started to smoke - hence the instruction was labeled "Halt and Catch Fire".[1]

In modern CPUs

CPU designers sometimes incorporate one or more undocumented machine code instructions, which exist for testing purposes. These instructions are not intended to be executed during real-world operation of the CPU. When these instructions are actually executed during a program, they have unusual side-effects.

The old "Halt and Catch Fire" instruction and HCF mnemonic are sometimes appropriated by users who discovered these instructions, as a humorous way of expressing that the unintended execution of such an instruction causes the system to fail to perform its normal functions.

Motorola 6800

The Motorola 6800 microprocessor was the first for which an 'HCF' opcode became widely known. The 6800 HCF opcode is 0xDD or 0xD9. The opcode came from an article written by Gerry Wheeler (1952–2006) in the December 1977 issue of BYTE magazine on undocumented opcodes.[2]

The opcode makes the processor enter a mode in which it continuously performs memory read cycles from successive addresses, with no intervening instruction fetches. The address bus effectively becomes a counter, allowing the operation of all address lines to be quickly verified. Once the processor has entered this mode, it is not responsive to interrupts, so normal operation can only be restored by a reset. It has been claimed that in some configurations, a 6800 CPU could actually cause the address lines to literally burn when placed in this mode.[3] However, it is likely that the term "catch fire" is intended more as a metaphor for the unresponsive and erratic behavior of the CPU when placed in this state; there are no known examples of such behavior.

The HCF opcode is believed to be the first built-in self-test feature on a Motorola microprocessor.[4]

The opcode is also present on the 6809.[5][6]

MIPS-X Programmer's Manual

The MIPS-X was a processor supported by the Defense Advanced Research Projects Agency. The Programmer's Manual for this chip describes an HSC (Halt and Spontaneously Combust) instruction, that is only found in a version of the processor designed for the National Security Agency.[7] The manual entry is a joke, and does not describe a genuine feature of the CPU.[citation needed]

In modern GPUs

NVIDIA GTX480

While not a true Halt and Catch Fire instruction, installing NVIDIA's 196.75 drivers on the system cause the GTX480 to overheat and occasionally begin to smoke or catch fire. On many occasions, this has led to house fires destroying the house the card was used in and even killing your family with burning woodscrews.

See also

References

  1. ^ http://catless.ncl.ac.uk/Risks/5.6.html#subj2.4 | RISKS Digest: Hardware vs Software Battles (from Usenet)
  2. ^ Wheeler, Gerry (December 1977). "Undocumented M6800 Instructions". BYTE. 2 (12): 46–47.
  3. ^ "The Jargon File, v 3.1.0". 15 October 1994. Retrieved 2010-07-08.
  4. ^ Daniels, R. Gary (April 1985). "Built-In Self-Test Trends in Motorola Microprocessors". IEEE Design & Test. 2 (2): pp. 64–71. doi:10.1109/MDT.1985.294865. {{cite journal}}: |pages= has extra text (help); Unknown parameter |coauthors= ignored (|author= suggested) (help) "HACOF thus became the first intentional built-in self-test feature on a Motorola microprocessor."
  5. ^ http://groups.google.com/group/comp.sys.m6809/msg/65030934ed15ed2b?dmode=source
  6. ^ http://groups.google.com/group/comp.sys.m6809/msg/7956eba6b219a5ec?dmode=source
  7. ^ Chow, Paul (May 1988). "MIPS-X Instruction Set and Programmer's Manual" (PDF). Stanford, California, United States of America: Computer Systems Laboratory, Departments of Electrical Engineering and Computer Science, Stanford University. Retrieved 2010-07-08.