ILLIAC

ILLIAC was a series of supercomputers built at a variety of locations, some at the University of Illinois at Urbana-Champaign. In all, five computers were built in this series between 1951 and 1974. Some more modern projects also use the name.

Architectural Blueprint

The architecture for the first two UIUC computers was taken from a technical report from a committee at the Institute for Advanced Study (IAS) at Princeton, First Draft of a Report on the EDVAC [1945], edited by John von Neumann (but with ideas from Eckert & Mauchley and many others.) The designs in this report were not tested at Princeton until a later machine, JOHNNIAC, was completed in 1953. However, the technical report was a major influence on computing in the 1950s, and was used as a blueprint for many other computers, including two at the University of Illinois, which were both completed before Princeton finished Johnniac. The University of Illinois was the only institution to build two instances of the IAS machine. In fairness, several of the other universities, including Princeton, invented new technology (new types of memory or I/O devices) during the construction of their computers, which delayed those projects.

ORDVAC

ORDVAC was the first of two computers built under contract at the University of Illinois. ORDVAC was completed the spring of 1951 and checked out in the summer. In the fall it was delivered to the US Army's Aberdeen Proving Grounds and was checked out in roughly one week. As part of the contract, funds were provided to the University of Illinois to build a second identical computer known as ILLIAC I.

ILLIAC I

ILLIAC I was built at the University of Illinois based on the same design as the ORDVAC. It was the first von Neumann architecture computer built and owned by an American university. It was put into service on September 22, 1952.

ILLIAC I was built with 2,800 vacuum tubes and weighed about 5 tons. It had 5k of main memory and 64k Drum memory. By 1956 it had gained more computing power than all computers in Bell Labs combined. ILLIAC I was decommissioned in 1963 when ILLIAC II (see below) became operational.

ILLIAC II

The ILLIAC II was the first transistorized and pipelined supercomputer built by the University of Illinois. At its inception in 1958 it was 100 times faster than competing machines of that day. It became operational in 1962, two years later than expected.

ILLIAC II had 8192 words of core memory, backed up by 65,536 words of storage on magnetic drums. The core memory access time was 1.8 to 2 µs. The magnetic drum access time was 7 µs. A "fast buffer" was also provided for storage of short loops and intermediate results (similar in concept to what is now called cache). The "fast buffer" access time was 0.25 µs

The word size was 52 bits. Floating-point numbers used a format with 7 bits of exponent (power of 4) and 45 bits of mantissa. Instructions were either 26 bits or 13 bits long, allowing packing of up to 4 instructions per memory word. The pipelined functional units were called advanced control, delayed control, and interplay. The computer used Muller speed-independent circuitry (i.e. Muller C-Element) for a portion of the control circuitry.

In 1963 Donald B. Gillies (who designed the control) used the ILLIAC II to find three Mersenne primes, with 2917, 2993, and 3376 digits - the largest primes known at the time.

Hideo Aiso (相磯秀夫, 1932-) from Japan participated in the development program and designed the arithmetic logic unit from September 1960.

ILLIAC III

The ILLIAC III was a fine-grained SIMD pattern recognition computer built by the University of Illinois in 1966.

This ILLIAC's initial task was image processing of bubble chamber experiments used to detect nuclear particles. Later it was used on biological images. The machine was destroyed in a fire, caused by a Variac shorting on one of the wooden-top benches, in 1968.

ILLIAC IV

Main article: ILLIAC IV

The ILLIAC IV was one of the first attempts at a massively parallel computer. Key to the design was fairly high parallelism with up to 256 processors, used to allow the machine to work on large data sets in what would later be known as vector processing. ILLIAC IV relied on first and early second generation semiconductor technology, resulting in pull out 'cards' that were on the order of two feet square. The power supplies for the machine were so large that it required designing a single tongue fork lift to remove and reinstall the power supply. The power supply buss bars on the machine spanned distances greater than three feet, and were octopus-like in design. Thick copper, the busses were coated in epoxy that often cracked resulting in shorts and an array of other issues. ILLIAC IV was designed by Burroughs Corporation and built in quadrants in Great Valley, PA during the years of 1967 through 1972. The machine was built in quadrants, with the first quadrant delivered to the University of Illinois in the summer of 1972. The building in which the quadrants was built was designed such that the wall at the end of the building was built to be easily removed. The quadrant itself was built on a flat bed trailer; when ready to deliver, the wall was removed, a truck backed down and connected to the trailer, driving away for delivery. Successive quadrants were built and delivered to the University of Illinois, with the entire system finally ready for operation in 1976, after a decade of development. In addition to being massively parallel, by that time it was also massively late, massively over budget, and massively outperformed by existing commercial machines such as Cray-1.

CEDAR

CEDAR was a hierarchical shared-memory supercomputer completed in 1988. The development team was led by Professor David Kuck. This SMP (symmetric multiprocessing) system embodied advances in interconnection networks, control unit support of parallelism, optimizing compilers and parallel algorithms and applications. It is occasionally referred to as ILLIAC V.

ILLIAC 6

Design of the ILLIAC 6 began in early 2005 at the University of Illinois Urbana-Champaign led by Luddy Harrison. It was intended as a 65536 node communications supercomputer utilizing commodity digital signal processors as the computation nodes. It was designed for over 1.2 quadrillion multiply-accumulate operations per second and a bi-sectional bandwidth of over 4 terabytes per second.

Trusted ILLIAC

The Trusted ILLIAC was completed in 2006 at the University of Illinois Urbana-Champaign's Coordinated Science Laboratory and Information Trust Institute. It was a 256 node Linux cluster, with each node having two processors.

Trusted ILLIAC nodes contained onboard FPGAs to enable smart compilers and programming models, system assessment and validation, configurable trust mechanisms, automated fault management, on-line adaptation, and numerous other configurable trust frameworks. The nodes each had access to 8 GB memory on a 6.4 GB/s bus, and were connected via 8 GB/s PCI-Express to the FPGAs. A 2.5 GB/s InfiniBand network provides the internode connectivity. The system was constructed using the help and support of Hewlett-Packard, AMD and Xilinx.

See also

• MUSASINO-1
• IAS Computer

External links

• Oral history interview with Gene H. Golub. Charles Babbage Institute, University of Minnesota. Golub discusses the construction of the ILLIAC computer, the work of Ralph Meager and David Wheeler on the ILLIAC design; programming; and the early users of the ILLIAC at the University of Illinois.
• Oral history interviews on ILLIAC computers. Charles Babbage Institute, University of Minnesota. Interviews include Herman H. Goldstine and relation to IAS computer; Stephen Lukasik and ARPA funding; David Wheeler who worked on ILLIAC and taught at Illinois 1951-53.
• ILLIAC I Machine Language Programming Manual
• ILLIAC I Manuals
• ILLIAC II Manual
• ILLIAC VI web site
• Trusted ILLIAC web site