Registered (also called buffered) memory modules have a register between the DRAM modules and the system's memory controller. They place less electrical load on the memory controller and allow single systems to remain stable with more memory modules than they would have otherwise. When compared with registered memory, conventional memory is usually referred to as unbuffered memory or unregistered memory. When manufactured as a dual in-line memory module (DIMM), a registered memory module is called an RDIMM, while unregistered memory is called UDIMM or simply DIMM.
Registered memory is often more expensive because of the lower number of units sold and additional circuitry required, so it is usually found only in applications where the need for scalability and robustness outweighs the need for a low price – for example, registered memory is usually used in servers.
Although most registered memory modules also feature error-correcting code memory (ECC), it is also possible for registered memory modules to not be error-correcting or vice versa. Unregistered ECC memory is supported and used in workstation or entry-level server motherboards that do not support very large amounts of memory.
Normally, there is a performance penalty for using registered memory. Each read or write is buffered for one cycle between the memory bus and the DRAM, so the registered RAM can be thought of as running one clock cycle behind the equivalent unregistered DRAM. With SDRAM, this only applies to the first cycle of a burst.
However, this performance penalty is not universal. There are many other factors involved in memory access speed. For example, the Intel Westmere 5600 series of processors access memory using interleaving, wherein memory access is distributed across three channels. If two memory DIMMs are used per channel, this "results in a reduction of maximum memory bandwidth for 2DPC (DIMMs per channel) configurations with UDIMM by some 5% in comparison to RDIMM".[attribution needed] (p. 14). This occurs because "when you go to two DIMMs per memory channel, due to the high electrical loading on the address and control lines, the memory controller uses a '2T' or '2N' timing for UDIMMs. Consequently, every command that normally takes a single clock cycle is stretched to two clock cycles to allow for settling time.
Usually, the motherboard must match the memory type; as a result, registered memory will not work in a motherboard not designed for it, and vice versa. Some PC motherboards accept or require registered memory, but registered and unregistered memory modules cannot be mixed. There is much confusion between registered and ECC memory; it is widely thought that ECC memory (which may or may not be registered) will not work at all in a motherboard without ECC support, not even without providing the ECC functionality, although the compatibility issues actually arise when trying to use registered memory (which also supports ECC and is described as ECC RAM) in a PC motherboard that does not support it.
Buffered memory types
Registered (Buffered) DIMM (R-DIMM) modules insert a buffer between the pins of the command and address buses on the DIMM and the memory chips. A high-capacity DIMM might have numerous memory chips, each of which must receive the memory address, and their combined input capacitance limits the speed at which the memory bus can operate. By redistributing the command and address signals within the R-DIMM, this allows more chips to be connected to the memory bus. The cost is increased memory latency, as a result of one additional clock cycle required for the address to traverse the additional buffer. Early registered RAM modules were physically incompatible with unregistered RAM modules, but the two variants of SDRAM R-DIMMs are mechanically interchangeable, and some motherboards may support both types.
Load Reduced DIMM (LR-DIMM) modules are similar to R-DIMMs, but add a buffer to the data lines as well. In other words, LR-DIMMs buffer both control and data lines while keeping the parallel nature of all signals. As a result, LR-DIMMs provides large overall maximum memory capacities, while avoiding the performance and power consumption problems of FB-DIMMs, induced by the required conversion between serial and parallel signal forms.
Fully Buffered DIMM (FB-DIMM) modules increase maximum memory capacities in large systems even more, using a more complex buffer chip to translate between the wide bus of standard SDRAM chips and a narrow, high-speed serial memory bus. In other words, all control, address and data transfers to FB-DIMMs are performed in a serial fashion, while the additional logic present on each FB-DIMM transforms serial inputs into parallel signals required to drive memory chips. By reducing the number of pins required per memory bus, CPUs could support more memory buses, allowing higher total memory bandwidth and capacity. Unfortunately, the translation further increased memory latency, and the complex high-speed buffer chips used significant power and generated a lot of heat.
Both FB-DIMMs and LR-DIMMs are designed primarily to minimize the load that a memory module presents to the memory bus. They are not compatible with R-DIMMs, and motherboards that require them usually will not accept any other kind of memory modules.
- "Servers and workstations: P9D-V motherboard". Asus. Retrieved December 4, 2014.
- "Dell servers example" (PDF). Dell.
- Deffree, Suzanne (September 20, 2011). "Basics of LRDIMM". EDN. Archived from the original on April 2, 2021.
- Johan De Gelas (2012-08-03). "LRDIMMs, RDIMMs, and Supermicro's Latest Twin". AnandTech. Retrieved 2014-09-09.
- "What is LR-DIMM, LRDIMM Memory? (Load-Reduce DIMM)". simmtester.com. Retrieved 2014-08-29.
- Memory Decisions, February 8, 2004
- Do I Need ECC and Registered Memory (.doc document)
- Basics of LRDIMM
- LRDIMM vs RDIMM: Signal integrity, capacity, bandwidth