Talk:PCI Express/Archive 2011
This is an archive of past discussions about PCI Express. Do not edit the contents of this page. If you wish to start a new discussion or revive an old one, please do so on the current talk page. |
Power
How much power does an PCI-E slot provide?--78.48.205.180 (talk) 16:08, 10 March 2011 (UTC)
Compatibility
It is stated that PCIe 2.0 is backward compatible to PCIe 1.0, in most cards and in most motherboards. It is also stated that most new motherboards supports PCIe 2.0. However, I think the article is missing information about support between 2.1 and 2.0 (in both "directions"). --Petter, 130.236.60.26 (talk) 16:13, 14 September 2010 (UTC)
- I came here to make note about the same issue. It is written that for PCIe ver 2.0, "motherboard slots are fully backward compatible with PCIe v1.x cards. PCIe 2.0 cards are also generally backward compatible with PCIe 1.x motherboards, using the available bandwidth of PCI Express 1.1."... Since it is not mentioned anywhere if this backward compatibility is in effect by design from industry standards for all next versions of PCIe (as for the PCIe protocol stack), then the backward compatibility information is missing. Either from PCI Express 2.1 paragraph, either from the PCI Express (standard) paragraph under the "Form Factor" section as a more general characteristic (or the "Architecture" section) if the later is the case. --HawkFest (talk) 14:55, 11 June 2011 (UTC)
overhead of 8b10b encoding
Going from 8 "uncoded" payload bits to 10 encoded bits adds 25% overhead since 10/8-1=.25. i.e net increase of 2 bits (which is 25% of eight) to get a 10 bit symbol. The article as of 19 Feb 2011 says "20% overhead in the electrical bandwidth." I'd rephrase to "25% encoding overhead <period>" Thanks. —Preceding unsigned comment added by 216.31.211.11 (talk) 00:03, 20 February 2011 (UTC)
Nah, when you send an 8b10b signal at a specific rate, 8 of every 10 bits contain data, hence, you utilize 80% of the available bandwidth for data, and thus the wasted overhead is 20%... — Preceding unsigned comment added by 216.239.45.4 (talk) 05:30, 12 June 2011 (UTC)
ThinkPad X220 PCIe Minicard SSD
User:Denniss, why did you undo the change to add the ThinkPad X220 into the Mini PCIe section? Do you know something we do not? Check the user manual for the X200 here to see on page 2 it discusses the "PCI Express Mini Card slot for wireless WAN or mSATA solid state drive (SSD)." Unless you or someone else can explain why this should not be added to that section I propose we add it back in. § Music Sorter § (talk) 16:18, 19 June 2011 (UTC)
- Shall we link/notice every single notebook/computer with such a device? --Denniss (talk) 19:59, 19 June 2011 (UTC)
- The list of those computers should be moved to the footnotes imho. -- Zac67 (talk) 20:13, 19 June 2011 (UTC)
- Good points. I just think we need to have some criteria. I am fine if we say there will be hundreds of devices that include this capability now (2011) and we should then make that statement to prevent future edits like this. In that case I agree with Zac67.
- I had heard there are some differences between some systems that claim to have PCIe-based mSATA interfaces which may or may not be standard. Maybe I only saw false rumors, but I thought there was some lack of clarification for what mSATA SSDs would work is some systems. If not true then let's update the article to clarify that and maybe only list the couple we have to say they were some of the first (or more popular) to support that interface. § Music Sorter § (talk) 03:32, 20 June 2011 (UTC)
Physical layer
The two paragraphs under Physical Layer
- "a slot of a large physical size (e.g., ×16) can be wired electrically with fewer lanes (e.g., ×1, ×4, ×8, or ×12) as long as it provides the ground connections required by the larger physical slot size."
and
- "Even though the two would be signal-compatible, it is not usually possible to place a physically larger PCIe card (e.g., a ×16 sized card) into a smaller slot —though if the PCIe slots are open-ended, by design or by hack, some motherboards will allow this."
seem contradictory. Using an open-ended (manufactured or hacked) connector won't provide the required grounds. — Preceding unsigned comment added by 204.42.171.71 (talk) 21:57, 22 June 2011 (UTC)
- My understanding is that open ended slots are strictly in violation of the spec but usually work in practice. Unfortunately the real specs are behind a paywall so it's expensive to check... Plugwash (talk) 10:05, 6 September 2011 (UTC)
Followup question
So if my x16 slots are full and I want to connect another x16 sized device, I might hack (literally) off the end of an x1 connector and it will probably work, though more slowly. To meet the spec (and to guarantee x1 performance) all I should have to do is add wiring for the ground connections on lanes 1 thru 15. Is that what you're saying? Surely there are references somewhere saying it has been successful or unsuccessful. — Preceding unsigned comment added by 68.183.134.245 (talk) 22:20, 3 November 2011 (UTC)
comparison table
a comparison table is missing --Johnny Bin (talk) 19:33, 1 October 2011 (UTC)
Data Link Layer
The article states (on Oct 12, 2011) that one of the three responsibilities of the data link layer is to "initialize and manage flow control credits". This seems to be in disagreement with other sources I've found online, such as this EE Times article and this PC Magazine article which both indicate that it's the transaction layer that manages the credits. --Isaksavo (talk) 08:15, 12 October 2011 (UTC)
Mini PCIe vs. mSATA Clarification
After reviewing the SATA spec (rev. 3.1, §6.5) and "PCI Express Mini Card Electromechanical Spec" (rev 1.2, §§2.2.3, 3.3), it appears that the two connectors were designed to be compatible. Both connectors are physically/mechanically identical. Electrically, the power pins on both are identical, and the data pins are designed to coexist. The pins carrying PCIe-specific signals are marked as "reserved - no connect" in the mSATA spec, and the pins carrying mSATA-specific signals are marked "Reserved" in the PCIe spec. The mSATA spec labels pin 43 as "Device Type" and includes the following note:
P43 to be a no connect on mSATA devices. Given that non-mSATA devices ground
P43, configurable shared-socket designs may use this pin to identify mSATA and
non-mSATA devices.
Based on this, dual-mode slots that support mini PCIe and mSATA are possible. The host machine checks pin 43 to determine whether the card is mini PCIe or mSATA and communicates accordingly. Unfortunately, neither spec makes a direct reference to the other, so they don't spell this out in clear language.
For an example of a device with a dual-mode slot, see the Zotac H55-ITX motherboard. Apophos (talk) 18:28, 15 December 2011 (UTC)