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ARM?

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Doesn't the ARM microprocessor use a Zero page to store hardware vector tables?

ShakespeareFan00 20:51, 4 June 2007 (UTC)[reply]

Direct Page register

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The main article would be improved if there were a paragraph on how the zero page could be moved around on the C-128 by adjusting the Direct Page register in the memory management unit. Dexter Nextnumber (talk) 09:52, 15 December 2009 (UTC)[reply]

Microcontrollers

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I know a lot of microcontrollers -- which often have built-in ram -- use a zero page for registers. — Preceding unsigned comment added by 67.188.161.192 (talk) 07:07, 2 October 2020 (UTC)[reply]

Size

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This paragraph doesn't really make sense. It perhaps describes one, or a few, historical 8-bit processors, but it does not at all describe the only 8-bit processors mentioned above the paragraph in the current page, the 6502 and the 6800. Thus "aforementioned" becomes a misdirection.

Absolute addresses are specified in 6800 machine code in one of two ways. One is the extended mode, which is two bytes or 16 bits. The other is the direct page (zero page) mode, which is one byte or 8 bits. In the direct page mode, the more significant 8 bits are implicitly zero, thus, page zero.

The 6502 inherits this addressing mode from the 6800, but WDC's literature calls it the zero page.

The way it reads now, it almost describes the 6502, but, if it is attempting to describe the 6502, it is conflating the size of the index registers with their use of the zero page, and just really doesn't quite describe things right. And it is missing the non-indexed use of the zero page. If this is important to discuss here (and it well might be, since it demonstrates how the zero page can be put to good use), it should be properly discussed in a section specific to either the 6502 or to using zero page variables as pointers.

The way it reads now, it does not describe the 6800 at all. The 6800 has a 16-bit index, and the only relevance to the direct page in the 6800 is that the direct page makes a good place to cache any variable, including index/pointer variables.

(I'd edit the page directly, but I've forgotten my password and the bot guard is preventing me from using today's temporary password.)

 — Preceding unsigned comment added by 2400:2650:7961:4100:5055:7C2E:E476:1E0C (talk) 07:53, 30 October 2021 (UTC)[reply] 

Repetition

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The first two sections say exactly the same thing in a slightly different way. This is obviously unnecessary. 2A0E:1D47:4115:4800:63D5:1C22:1FA4:D70D (talk) 19:50, 9 March 2024 (UTC)[reply]