Talk:ARM architecture

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Samsung - Really 64-bit?[edit]

"The first ARMv8-A SoC from Samsung is the Exynos 5433" - looking at the ref it's actually used in 32-bit mode and thought to never will be used in 64-bit mode. Now, if the software is not available to enable it but they could later (even if they might not) then it is ARMv8-A. But academically, if you could only run it in 32-bit mode (maybe for hardware reasons? seems might be the reason from the ref), is it then really the first 64-bit ARMv8-A from Samsung, big.LITTLE or not? comp.arch (talk) 20:34, 17 September 2014 (UTC)

It depends on the point of view. But I've added the fact that it will run only in 32-bit mode. Vincent Lefèvre (talk) 00:54, 18 September 2014 (UTC)

Please define core[edit]

The following sentences seem inconsistent: "ARM Holdings develops the instruction set and architecture for ARM-based products, but does not manufacture products. The company periodically releases updates to its cores." Cores are hardware, aren't they? Could a subject matter expert please define core and ensure the word is used consistently in the article? 3dimen (talk) 02:56, 4 October 2014 (UTC)

"Cores are hardware, aren't they?" Not necessarily. Guy Harris (talk) 06:38, 4 October 2014 (UTC)
The "cores" are designs/plans, not the finished hardware. It's like an architect designing a building interior and selling it to multiple clients, each of which can design their own front, back, roof, etc before actually building it. Does that help? --Imroy (talk) 13:33, 4 October 2014 (UTC)
Cores can be purely "software", in case of ARM Cortex-M1 (only this one core?), for an FPGA. comp.arch (talk) 11:26, 6 October 2014 (UTC)

Vulcan first threaded ARM? Only transactional support missing? Branch prediction - what makes for fast?[edit]

See my edit and most recent there. Anything to add there/simplify?

It seems ARM is closing the performance gap - "90% of Hawell" for a single thread (w/lower power, more throughput). ARM can have more cores than x86 (how many more?) and more than Power(PC), SPARC, MIPS (what else is there mainstream..)? Did Tilera kind of not make it (compared to ARM)? - acquired in July for $50 million in cash..

With the new simple 64-bit arch it seems ARM learned from it's mistakes and others. x86, Power, SPARC (others?) had threading, if I'm not misunderstanding Vulcan has that. x86 and Power have transaction support - still do not see that (or L4 cache (support)) in ARM. Could be added? Anything else missing from ARM? Anything that makes it slower?

Newest Intel's x86 is impressive (45 MB cache) and increased single-threaded performance. I assume with same cache amount ARM could be made as fast? comp.arch (talk) 16:09, 10 October 2014 (UTC)

Odd number of cores - literally[edit]

Apple A8X and at least transistor count has been updated to three core confuguration based on benchmark data[1]. Is this a first (for ARM) for non-heterogenous (unlike Infineon TriCore). Any reason Linux/Android couldn't work in an unusual config like this? comp.arch (talk) 22:17, 22 October 2014 (UTC)