RapidIO: Difference between revisions
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* [http://www.rapidio.org/ RapidIO: Home] |
* [http://www.rapidio.org/ RapidIO: Home] |
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* [http://www.rapidio.org/specs/current RapidIO Specifications] |
* [http://www.rapidio.org/specs/current RapidIO Specifications] |
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* [http://www.altera.com/technology/high_speed/protocols/rapid_io/pro-rapid_io.html Altera's Serial RapidIO Solutions] |
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[[Category:Computer buses]] |
[[Category:Computer buses]] |
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[[Category:Consortia|RapidIO Trade Association]] |
[[Category:Consortia|RapidIO Trade Association]] |
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Revision as of 03:24, 16 June 2009
The RapidIO architecture is a high-performance packet-switched, interconnect technology for interconnecting chips on a circuit board, and also circuit boards to each other using a backplane. This technology is designed specifically for embedded systems, primarily for the signal processing, networking, and communications markets.
The main competitors are HyperTransport, Infiniband, and PCI Express, but these are targeted at the desktop and high performance computing arenas, as opposed to embedded systems.
RapidIO was developed by Mercury Computer Systems and Motorola (now Freescale), primarily as an upgraded interconnect for Mercury's embedded NUMA/cluster ("multicomputer") signal processing computers.
Technology
There are two incarnations of RapidIO Technology: Parallel RapidIO and Serial RapidIO. The main difference between the two is that Parallel RapidIO has a separate clock signal, while Serial RapidIO uses 8B/10B encoding to transmit the clock along with the signal serially.
Packets are big-endian, 256 bytes, with 8-bit or 16-bit addresses, and routed by crossbar switches. Links are Point-to-point, with handshaking and reservations to ensure that packets need not be dropped. Links are commonly half-duplex parallel Low voltage differential signaling or serial fiber optic. Special signaling allows timestamps to flood fill through the fabric without concern for packet boundaries. RapidIO is designed to support memory mapping, mailbox queues, and doorbell-style interrupts.
Rapid IO interfaces can be driven at different baud rates. The maximum speed achieved can be 6.25 Gbit/s per lane.
RapidIO Trade Association
Industry leaders in networking, communications, semiconductors, and embedded systems have founded the RapidIO Trade Association to develop and support this international open standard. Alcatel-Lucent, AMCC, EMC Corporation, Ericsson, Freescale, Texas Instruments, and Tundra Semiconductor comprise the Steering Committee of the RapidIO Trade Association.
Liaisons
The RapidIO Trade Association has numerous liaisons with other industry groups including the Optical Internetworking Forum, PICMG and the Mountain View Alliance.