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=== Blue Gene/Q ===
=== Blue Gene/Q ===
The [[Blue Gene|Blue Gene/Q]] processor is a 18 core chip running at 1.6 GHz with special features for fast thread context switching, quad pumped [[Floating-point unit|floating point unit]], 5D torus network and 10 Gbit I/O. The cores are liked by a [[crossbar switch]] at half core speed to a 32 MB [[eDRAM]] [[CPU cache|L2 cache]]. A Blue Gene/Q chip have two [[DDR3 SDRAM|DDR3]] memory controllers running at 1.33 GHz, supporting up to 16 GB RAM.<ref>{{cite web | title = US commissions beefy IBM supercomputer | publisher = IDG News Service | author=Joab Jackson | date = 2011-02-08 | url=http://www.itworld.com/hardware/136215/us-commissions-beefy-ibm-supercomputer}}</ref><ref>{{cite web | title = IBM’s BlueGene/Q Super Chip Grows 18th Core | publisher = insideHPC.com | date =2011-08-26 | accessdate = 2011-08-26 | url = http://insidehpc.com/2011/08/26/ibms-bluegeneq-super-chip-grows-18th-core/}}</ref>
The [[Blue Gene|Blue Gene/Q]] processor is a 18 core chip running at 1.6 GHz with special features for fast thread context switching, quad pumped [[Floating-point unit|floating point unit]], 5D torus network and 10 Gbit I/O. The cores are linked by a [[crossbar switch]] at half core speed to a 32 MB [[eDRAM]] [[CPU cache|L2 cache]]. A Blue Gene/Q chip have two [[DDR3 SDRAM|DDR3]] memory controllers running at 1.33 GHz, supporting up to 16 GB RAM.<ref>{{cite web | title = US commissions beefy IBM supercomputer | publisher = IDG News Service | author=Joab Jackson | date = 2011-02-08 | url=http://www.itworld.com/hardware/136215/us-commissions-beefy-ibm-supercomputer}}</ref><ref>{{cite web | title = IBM’s BlueGene/Q Super Chip Grows 18th Core | publisher = insideHPC.com | date =2011-08-26 | accessdate = 2011-08-26 | url = http://insidehpc.com/2011/08/26/ibms-bluegeneq-super-chip-grows-18th-core/}}</ref>


It uses 16 cores for computing, and one core for running an operating system. This core will take care of [[interrupt]]s, asynchronous [[Input/output|I/O]], [[Message Passing Interface|MPI pacing]] and [[Reliability, Availability and Serviceability|RAS]] functionality and will be remapped to a functional core in case of failure of one of the other cores. The 18th core is used as a spare in case one of the other cores are permanently damaged, like in manufacturing, but could be used as [[hot spare]] as well. The Blue Gene/Q chip is manufactured on IBM's copper SOI process at 45 nm, and will deliver 205 [[FLOPS|GFLOPS]] at 1.6 GHz and draw 55 watts. It is 19×19 mm large (359.5 mm²) and comprise 1.47 billion transistors.
It uses 16 cores for computing, and one core for running an operating system. This core will take care of [[interrupt]]s, asynchronous [[Input/output|I/O]], [[Message Passing Interface|MPI pacing]] and [[Reliability, Availability and Serviceability|RAS]] functionality and will be remapped to a functional core in case of failure of one of the other cores. The 18th core is used as a spare in case one of the other cores are permanently damaged, like in manufacturing, but could be used as [[hot spare]] as well. The Blue Gene/Q chip is manufactured on IBM's copper SOI process at 45 nm, and will deliver 205 [[FLOPS|GFLOPS]] at 1.6 GHz and draw 55 watts. It is 19×19 mm large (359.5 mm²) and comprise 1.47 billion transistors.


== References ==
== References ==

Revision as of 19:31, 29 August 2011

The PowerPC A2 is a massively multicore capable and multithreaded 64-bit Power Architecture processor core designed by IBM using the Power ISA v.2.06 specification. Versions of processors based on the A2 core range from a 2.3 GHz version with 16 cores consuming 65 W to a less powerful, four core version, consuming 20 W at 1.4 GHz. Each A2 core is capable of four-way multithreading and have 16+16 instruction and data cache per core.

Products

PowerEN

The PowerEN (Power Edge of Network), or the "wire-speed processor", is designed as hybrid between regular networking processors, doing switching and routing and a typical server processor, that is manipulating and packaging data. It was revealed February 8 2010, at ISSCC 2010.

Each chip has 8 MB of cache as well a multitude of task specific engines besides the general purpose processors, such as XML, cryptography, compression and regular expression accelerators, four 10 Gigabit Ethernet ports and two PCIe lanes. Up to four chips can be linked in a SMP system without any additional support chips. The chips are said to be extremely complex, and uses 1.43 billion transistors, on a die size of 428 mm² fabricated on a 45 nm process. The processors are in a late development stage and finalized products will be available at a later, unknown date. IBM says it will market the processors to customers.

Blue Gene/Q

The Blue Gene/Q processor is a 18 core chip running at 1.6 GHz with special features for fast thread context switching, quad pumped floating point unit, 5D torus network and 10 Gbit I/O. The cores are linked by a crossbar switch at half core speed to a 32 MB eDRAM L2 cache. A Blue Gene/Q chip have two DDR3 memory controllers running at 1.33 GHz, supporting up to 16 GB RAM.[1][2]

It uses 16 cores for computing, and one core for running an operating system. This core will take care of interrupts, asynchronous I/O, MPI pacing and RAS functionality and will be remapped to a functional core in case of failure of one of the other cores. The 18th core is used as a spare in case one of the other cores are permanently damaged, like in manufacturing, but could be used as hot spare as well. The Blue Gene/Q chip is manufactured on IBM's copper SOI process at 45 nm, and will deliver 205 GFLOPS at 1.6 GHz and draw 55 watts. It is 19×19 mm large (359.5 mm²) and comprise 1.47 billion transistors.

References

  1. ^ Joab Jackson (2011-02-08). "US commissions beefy IBM supercomputer". IDG News Service.
  2. ^ "IBM's BlueGene/Q Super Chip Grows 18th Core". insideHPC.com. {{cite web}}: Missing or empty |url= (help); Unknown parameter | accessdate= ignored (help); Unknown parameter | date= ignored (help); Unknown parameter | url= ignored (help)