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=== Contributions to [[High-level synthesis|high-level synthesis]] ===
=== Contributions to [[High-level synthesis|high-level synthesis]] ===


Mohanty is a contributor to nanoscale CMOS or nanoelectronic technology based [[high-level synthesis]] (HLS) or architecture-level synthesis.<ref>Saraju Mohanty and Elias Kougianos, "Simultaneous Power Fluctuation and Average Power Minimization during Nano-CMOS Behavioral Synthesis", in Proceedings of the 20th International Conference on VLSI Design, pp. 577-582, 2007.</ref><ref>{{cite journal | last1 = Mohanty | first1 = S. P. | last2 = Gomathisankaran | first2 = M. | last3 = Kougianos | first3 = E. | year = 2014 | title = Variability-Aware Architecture Level Optimization Techniques for Robust Nanoscale Chip Design | url = | journal = Elsevier Computers and Electrical Engineering Journal | volume = 40 | issue = 1| pages = 168–193 | doi=10.1016/j.compeleceng.2013.11.026}}</ref><ref>{{cite journal | last1 = Chen | first1 = Y. | last2 = Wang | first2 = Y. | last3 = Takach | first3 = A. | last4 = Xie | first4 = Y. | year = | title = Parametric Yield Driven Resource Binding in High-Level Synthesis with Multi-Vth Vdd Library and Device Sizing | url = | journal = Journal of Electrical and Computer Engineering | volume = 2012 | issue = | page = 105250 }}</ref> His nanoelectronic-based [[High-level synthesis]] techniques addresses the issue of process variations, the primary issue of nanoelectronic technology, during the high-level synthesis itself before the digital design moves to the detailed and lower levels of design abstractions, such as logic-level or transistor-level.<ref>"Unified Challenges in Nano-CMOS High-Level Synthesis", Invited Talk, 22nd IEEE International Conference on VLSI Design, 2009.</ref>
Mohanty is a contributor to nanoscale CMOS or nanoelectronic technology based [[high-level synthesis]] (HLS) or architecture-level synthesis.<ref>Saraju Mohanty and Elias Kougianos, "Simultaneous Power Fluctuation and Average Power Minimization during Nano-CMOS Behavioral Synthesis", in Proceedings of the 20th International Conference on VLSI Design, pp. 577-582, 2007.</ref><ref>{{cite journal | last1 = Mohanty | first1 = S. P. | last2 = Gomathisankaran | first2 = M. | last3 = Kougianos | first3 = E. | year = 2014 | title = Variability-Aware Architecture Level Optimization Techniques for Robust Nanoscale Chip Design | url = | journal = Elsevier Computers and Electrical Engineering Journal | volume = 40 | issue = 1| pages = 168–193 | doi=10.1016/j.compeleceng.2013.11.026}}</ref><ref>{{cite journal | last1 = Chen | first1 = Y. | last2 = Wang | first2 = Y. | last3 = Takach | first3 = A. | last4 = Xie | first4 = Y. | year = | title = Parametric Yield Driven Resource Binding in High-Level Synthesis with Multi-Vth Vdd Library and Device Sizing | url = | journal = Journal of Electrical and Computer Engineering | volume = 2012 | issue = | page = 105250 }}</ref> His nanoelectronic-based [[High-level synthesis]] techniques addresses the issue of process variations, the primary issue of nanoelectronic technology, during the high-level synthesis itself before the digital design moves to the detailed and lower levels of design abstractions, such as logic-level or transistor-level.<ref>"Unified Challenges in Nano-CMOS High-Level Synthesis", Invited Talk, 22nd IEEE International Conference on VLSI Design, 2009.</ref>

=== Contributions to [[Digital watermarking]] and [[Digital rights management]] (DRM) ===

Mohanty has worked on the Secure Digital Camera (SDC) for real-time [[Digital rights management]] (DRM) at the source end of the multimedia content. The SDC has quite diverse applications where still image or video digital cameras are needed, such as secure Digital Video Broadcasting, secure Video Surveillance, electronic passport, and identity card processing. The secure digital camera (SDC) has been well-adopted by various researchers worldwide.<ref>Thomas Winkler, Adam Erdelyi, and Bernhard Rinner, "TrustEYE M4: Protecting the Sensor--not the Camera", in Proceedings of the International Conference on Advanced Video and Signal Based Surveillance, 2014.</ref><ref>S. D. Roy, X. Li, Y. Shoshan, A. Fish, and O. Yadid-Pecht, "Hardware Implementation of a Digital Watermarking System for Video Authentication". IEEE Transactions on Circuits and Systems for Video Technology. 23 (2), 2013, pp. 289–301.</ref><ref>C. -T. Yen, T. Wu, M. -H. Guo, C. -K. Yang, and H. -C. Chao, "Digital product transaction mechanism for electronic auction environment". IET Information Security. 4 (4), 2010, pp. 248–257.</ref>


== Professional leadership ==
== Professional leadership ==

Revision as of 20:51, 17 January 2017

Saraju Mohanty
Prof. Saraju Mohanty in 2012
Born
Odisha, India
NationalityUnited States
Alma materUniversity of South Florida (USF), Tampa
Indian Institute of Science (IISc), Bangalore
Orissa University of Agriculture and Technology (OUAT), Bhubaneswar
Occupation(s)Professor, author, scientist, computer engineer
Known forMixed-Signal Systems, Nanoelectronics Systems, Metamodeling, Design for X, High-level synthesis, Hardware-assisted digital watermarking
Notable workNanoelectronic Mixed-Signal System Design, McGraw-Hill, 2015, ISBN 978-0071825719
SpouseDr. Uma Choppali
Honors2016 PROSE Award for best textbook in Physical Sciences & Mathematics


2016-17 Toulouse Scholars Award from University of Toulouse

President's Scout Award in 1988
Websitewww.smohanty.org

Saraju Mohanty is an American professor of the Department of Computer Science and Engineering, and the Director of the NanoSystem Design Laboratory , at the University of North Texas in Denton, Texas.[1][2] Professor Mohanty is a researcher in the areas of "Low-Power High-Performance Nanoelectronics Systems" and "hardware-assisted Digital watermarking".[3] He has made significant research contributions to analogue electronics and mixed-signal integrated circuit computer-aided design and Electronic design automation, nanoelectronic technology based high-level synthesis, and hardware-assisted digital watermarking. He has held the Chair of the IEEE Computer Society's Technical Committee on Very Large Scale Integration since September 2014.[4][5] He holds 4 US patents in the areas of his research. Professor Mohanty has published 200 papers and 3 books.[6][7][8]

Education

Saraju Mohanty started his schooling at Lodhachua, Nayagarh, Odisha. After graduating from Badagada Government High School, Bhubaneswar in 1988, Mohanty completed a 10+2 Science degree from Rajdhani College, Bhubaneswar in 1990. Whilst at high school he was a quite active and recognized member of The Bharat Scouts and Guides. He received his bachelor's degree (with Honors) in electrical engineering from the College of Engineering and Technology, Bhubaneswar, Orissa University of Agriculture and Technology, in 1995.[citation needed]

In 1999 Mohanty completed a master's degree in engineering in Systems Science and Automation from the Indian Institute of Science in Bangalore, India. His master's thesis mentors were Professor K. R. Ramakrishnan[9] and Professor Mohan S. Kankanhalli[10] with whom he co-authored his first peer-reviewed paper.[11] Mohanty earned a Ph.D. in computer engineering from the University of South Florida in 2003. His Ph.D. mentor was Professor N. Ranganathan (IEEE Fellow and AAAS Fellow).[12][13][14]

Notable scientific contributions

Contributions to analog electronics and mixed-signal circuits

Mohanty has worked on design space exploration and optimization of nanoelectronic integrated circuits. The key feature of these design flows is the need for only two manual layout (or physical design) iterations which saves significant design effort. These ultra-fast design flows rely on accurate metamodels of the analog and mixed-signal circuit components. His research significantly advances the state-of-the art in Design for Excellence (DfX) or Design for X, such as Design for Variability (DfV) and Design for Cost (DfC).[15]

Contributions to high-level synthesis

Mohanty is a contributor to nanoscale CMOS or nanoelectronic technology based high-level synthesis (HLS) or architecture-level synthesis.[16][17][18] His nanoelectronic-based High-level synthesis techniques addresses the issue of process variations, the primary issue of nanoelectronic technology, during the high-level synthesis itself before the digital design moves to the detailed and lower levels of design abstractions, such as logic-level or transistor-level.[19]

Contributions to Digital watermarking and Digital rights management (DRM)

Mohanty has worked on the Secure Digital Camera (SDC) for real-time Digital rights management (DRM) at the source end of the multimedia content. The SDC has quite diverse applications where still image or video digital cameras are needed, such as secure Digital Video Broadcasting, secure Video Surveillance, electronic passport, and identity card processing. The secure digital camera (SDC) has been well-adopted by various researchers worldwide.[20][21][22]

Professional leadership

Editorial board

Professional membership

Awards and honors

References

  1. ^ The University of North Texas, Dept. of Computer Science and Engineering, NanoSystem Design Laboratory, http://nsdl.cse.unt.edu/
  2. ^ The University of North Texas, Dept. of Computer Science and Engineering, http://www.cse.unt.edu/site/node/91
  3. ^ Research Interests, Prof. Saraju Mohanty, http://www.cse.unt.edu/~smohanty/Research.html
  4. ^ Dr. Saraju Mohanty Serves as the Chair of the Technical Committee on Very Large Scale Integration (TCVLSI), https://facultysuccess.unt.edu/dr-saraju-mohanty-serves-chair-technical-committee-very-large-scale-integration-tcvlsi
  5. ^ Technical Committee on VLSI, http://www.computer.org/portal/web/tandc/tcvlsi
  6. ^ ResearchGate - Saraju Mohanty, http://www.researchgate.net/profile/Saraju_Mohanty
  7. ^ Google Scholar List - Saraju Mohanty, https://scholar.google.com/scholar?hl=en&q=saraju+mohanty
  8. ^ DBLP - Saraju Mohanty, http://dblp.uni-trier.de/pers/hd/m/Mohanty:Saraju_P=.html
  9. ^ S. P. Mohanty, "Watermarking of Digital Images", Master of Engineering in System Science and Automation Thesis, Indian Institute of Science, Bangalore, January 1999, http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.10.1673&rep=rep1&type=pdf
  10. ^ "Past Postdocs and Graduated Students". Retrieved 8 August 2016.
  11. ^ S. P. Mohanty, K. R. Ramakrishnan, and M. S. Kanakanhalli, "A Dual Watermarking Technique for Images", in Proceedings of the 7th ACM International Multimedia Conference (ACMMM) (Vol. 2), pp.49-51, 1999.
  12. ^ S. P. Mohanty, "Energy and Transient Power Minimization During Behavioral Synthesis", Ph.D. Dissertation, Department of Computer Science and Engineering, University of South Florida, 2003, http://etd.fcla.edu/SF/SFE0000129/SarajuDissertationFinal.pdf
  13. ^ Computer Science Tree, N. Ranganathan, University of South Florida, http://academictree.org/computerscience/tree.php?pid=416222
  14. ^ Nagarajan “Ranga” Ranganathan, Department of Computer Science and Engineering, University of South Florida, Tampa, FL 33620,http://www.usf.edu/engineering/cse/documents/ranganathan-cv.pdf
  15. ^ DFX for Nanoelectronic Embedded Systems, Keynote Address at First IEEE Sponsored International Conference on Control, Automation, Robotics and Embedded System, CARE-2013, http://care.iiitdmj.ac.in/Keynote_Speakers.html.
  16. ^ Saraju Mohanty and Elias Kougianos, "Simultaneous Power Fluctuation and Average Power Minimization during Nano-CMOS Behavioral Synthesis", in Proceedings of the 20th International Conference on VLSI Design, pp. 577-582, 2007.
  17. ^ Mohanty, S. P.; Gomathisankaran, M.; Kougianos, E. (2014). "Variability-Aware Architecture Level Optimization Techniques for Robust Nanoscale Chip Design". Elsevier Computers and Electrical Engineering Journal. 40 (1): 168–193. doi:10.1016/j.compeleceng.2013.11.026.
  18. ^ Chen, Y.; Wang, Y.; Takach, A.; Xie, Y. "Parametric Yield Driven Resource Binding in High-Level Synthesis with Multi-Vth Vdd Library and Device Sizing". Journal of Electrical and Computer Engineering. 2012: 105250.
  19. ^ "Unified Challenges in Nano-CMOS High-Level Synthesis", Invited Talk, 22nd IEEE International Conference on VLSI Design, 2009.
  20. ^ Thomas Winkler, Adam Erdelyi, and Bernhard Rinner, "TrustEYE M4: Protecting the Sensor--not the Camera", in Proceedings of the International Conference on Advanced Video and Signal Based Surveillance, 2014.
  21. ^ S. D. Roy, X. Li, Y. Shoshan, A. Fish, and O. Yadid-Pecht, "Hardware Implementation of a Digital Watermarking System for Video Authentication". IEEE Transactions on Circuits and Systems for Video Technology. 23 (2), 2013, pp. 289–301.
  22. ^ C. -T. Yen, T. Wu, M. -H. Guo, C. -K. Yang, and H. -C. Chao, "Digital product transaction mechanism for electronic auction environment". IET Information Security. 4 (4), 2010, pp. 248–257.
  23. ^ a b UNT Professor Receives Editorial Appointments, Recognition, http://engineering.unt.edu/unt-professor-receives-editorial-appointments-recognition
  24. ^ IEEE Consumer Electronics Magazine Editorial Board, http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7450780
  25. ^ IEEE Consumer Electronics Magazine, http://ieeexplore.ieee.org/xpl/aboutJournal.jsp?punumber=5962380
  26. ^ IEEE Consumer Electronics Magazine, http://cesoc.ieee.org/publications/ce-magazine.html
  27. ^ VLSI Circuits and Systems Letter (VCAL) -- Editorial Board, https://www.computer.org/web/tcvlsi/editorial-board
  28. ^ Saraju P. Mohanty, ACM Senior Member, United States – 2010, http://awards.acm.org/award_winners/mohanty_2241263.cfm
  29. ^ Chair TCVLSI Bio, https://www.computer.org/cms/technical-activities/Technical-Committees/Elections/tcvlsi/2016/mohanty-2016-tcvlsi-biosketch-and-position-statement.pdf
  30. ^ Peter Corcoran, Welcome to Our Incoming Editor-in-Chief, CE Magazine Editorial, http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7539241
  31. ^ Technical & Conferences Activities Board -- Technical Committees -- Technical Committee on VLSI, http://www.computer.org/web/tandc/tcvlsi
  32. ^ Dr. Saraju Mohanty Serves as the Chair of the Technical Committee on Very Large Scale Integration (TCVLSI), http://www.cse.unt.edu/site/node/678
  33. ^ 2016 PROSE Award Winners, https://proseawards.com/winners/2016-award-winners/#body
  34. ^ Saraju Mohanty wins McGraw-Hill textbook award, https://facultysuccess.unt.edu/faculty-awards/saraju-mohanty-wins-mcgraw-hill-textbook-award
  35. ^ Engineering Professor Receives Awards, http://engineering.unt.edu/engineering-professor-receives-awards
  36. ^ Salute to Faculty Excellence 2016 Winners, http://facultysuccess.unt.edu/salute-faculty-excellence-2016-winners-0
  37. ^ ISVLSI 2015, http://www.eng.ucy.ac.cy/theocharides/isvlsi15/
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