Hardware Trojan

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A Hardware Trojan (HT) is a malicious modification of the circuitry of an integrated circuit. A hardware Trojan is completely characterized by its physical representation and its behavior. The payload of an HT is the entire activity that the Trojan executes when it is triggered. In general, malicious Trojans try to bypass or disable the security fence of a system: It can leak confidential information by radio emission. HTs also could disable, derange or destroy the entire chip or components of it.


In a diverse global economy, outsourcing of production tasks is a common way to lower a product's cost. Embedded hardware devices are not always produced by the firms that design and/or sell them, nor in the same country where they will be used. Outsourced manufacturing can raise doubt about the evidence for the integrity of the manufactured product (i.e., one's certainty that the end-product has no design modifications compared to its original design). Anyone with access to the manufacturing process could, in theory, introduce some change to the final product. For complex products, small changes with large effects can be difficult to detect.

The threat of a serious, malicious, design alteration can be especially relevant to government agencies. Resolving doubt about hardware integrity is one way to reduce technology vulnerabilities in the military, finance, energy and political sectors of an economy. Since fabrication of integrated circuits in untrustworthy factories is common, advanced detection techniques have emerged to discover when an adversary has hidden additional components in, or otherwise sabotaged, the circuit's function.

Characterization of hardware Trojans[edit]

A HT can be characterized by several methods such as by its physical representation, activation phase and its action phase. Alternative methods characterize the HT by trigger, payload and stealth.

Physical characteristics[edit]

One of this physical Trojan characteristics is the type. The type of a Trojan can be either functional or parametric. A Trojan is functional if the adversary adds or deletes any transistors or gates to the original chip design. The other kind of Trojan, the parametric Trojan, modifies the original circuitry, e.g. thinning of wires, weakening of flip-flops or transistors, subjecting the chip to radiation, or using Focused Ion-Beams (FIB) to reduce the reliability of a chip.

The size of a Trojan is its physical extension or the number of components it is made of. Because a Trojan can consist of many components, the designer can distribute the parts of a malicious logic on the chip. The additional logic can occupy the chip wherever it is needed to modify, add or remove a function. If the function of the Trojan demands it, on the one hand malicious components can be scattered. This is called loose distribution. On the other hand, a Trojan can consist of only few components, so the area is small where the malicious logic occupies the layout of the chip. In contrast this is called tight distribution.

If the adversary spares no effort, then he regenerates the layout, so that the placement of the components of the IC is altered. In rare cases the chip dimension is altered. These changes are structural alterations.

Activation characteristics[edit]

The typical Trojan is condition-based: It is triggered by sensors, internal logic states, a particular input pattern or an internal counter value. Condition-based Trojans are detectable with power traces to some degree when inactive. That is due to the leakage currents generated by the trigger or counter circuit activating the Trojan.

Hardware Trojans can be triggered in different ways. A Trojan can be internally activated, that means it monitors one or more signals inside the IC. The malicious circuitry could wait for a count down logic an attacker added to the chip, so that the Trojan awakes after a specific time-span. The opposite is externally activated. There can be malicious logic inside a chip, that uses an antenna or other sensors the adversary can reach from outside the chip. For example, a Trojan could be inside the control system of a cruising missile. The owner of the missile does not know, that the enemy will be able to switch off the rockets by radio.

A Trojan which is always-on can be a reduced wire. A chip that is modified in this way produces errors or fails every time the wire is used intensely. Always-on circuits are hard to detect with power trace.

In this context combinational Trojans and sequential Trojans are distinguished. A combinational Trojan monitors internal signals until a specific condition happens. A sequential Trojan is also an internally activated condition-based circuit, but it monitors the internal signals and searches for sequences not for a specific state or condition like the combinational Trojans do.

Cryptographic key extraction[edit]

Extraction of secret keys by means of a hardware Trojan without detecting the Trojan requires that the Trojan uses a random signal or some cryptographic implementation itself.

To avoid storing a cryptographic key in the Trojan itself and reduction, Physical unclonable function can be used.[1] Physical unclonable functions are small in size and can have an identical layout while the cryptographic properties are different

Action characteristics[edit]

A HT could modify the chip's function or changes the chip's parametric properties (e.g. provokes a process delay). Confidential information can also be transmitted to the adversary (transmission of key information).

Peripheral device hardware Trojans[edit]

A relatively new threat vector to networks and network endpoints is a HT appearing as a physical peripheral device that is designed to interact with the network endpoint using the approved peripheral device's communication protocol. For example, a USB keyboard that hides all malicious processing cycles from the target network endpoint to which it is attached by communicating with the target network endpoint using unintended USB channels. Once sensitive data is ex-filtrated from the target network endpoint to the HT, the HT can process the data and decide what to do with it: store it to memory for later physical retrieval of the HT or possibly ex-filtrate it to the internet using wireless or using the compromised network endpoint as a pivot.[2][3]

Potential of threat[edit]

A common Trojan is passive for the most time-span an altered device is in use, but the activation can cause a fatal damage. If a Trojan is activated the functionality can be changed, the device can be destroyed or disabled, it can leak confidential information or tear down the security and safety. Trojans are stealthy, that means the precondition for activation is a very rare event. Traditional testing techniques are not sufficient. A manufacturing fault happens at a random position while malicious changes are well placed to avoid detection.


Physical Inspection[edit]

First, the molding coat is cut to reveal the circuitry. Then, the engineer repeatedly scans the surface while grinding the layers of the chip. There are several operations to scan the circuitry. Typical visual inspection methods are: scanning optical microscopy (SOM), scanning electron microscopy (SEM),[4] pico-second imaging circuit analysis (PICA), voltage contrast imaging (VCI), light induced voltage alteration (LIVA) or charge induced voltage alteration (CIVA). To compare the floor plan of the chip has to be compared with the image of the actual chip. This is still quite challenging to do. To detect trojan hardware which include (crypto) keys which are different, an image diff can be taken to reveal the different structure on the chip. The only known hardware trojan using unique crypto keys but having the same structure is .[5] This property enhances the undetectability of the trojan.

Functional testing[edit]

This detection method stimulates the input ports of a chip and monitors the output to detect manufacturing faults. If the logic values of the output do not match the genuine pattern, then a defect or a Trojan could be found.

Built-in tests[edit]

Built-in self-test (BIST) and Design For Test (DFT) techniques add circuitry (logic) to the chip intended to help verify that the chip, as built, implements its functional specification. The extra logic monitors input stimulus and internal signals or memory states, generally by computing checksums or by exposing internal registers via a customized scanning technique. Where DFT usually coordinates with some external testing mechanism, BIST-enabled chips incorporate custom test-pattern generators. BIST functionality often exists to perform at-speed (high speed) verification where it is not possible to use scan chains or other low-speed DFT capabilities. Both methods were originally developed to detect manufacturing errors, but also have the double-edged potential to detect some effects of malicious logic on the chip, or to be exploited by malicious logic to covertly inspect remote state within the chip.

Consider how DFT recognizes unintended logic. When driven by DFT inputs, a genuine chip generates a familiar signature, but a defective or altered chip displays an unexpected signature. The signature may consist of any number of data outputs from the chip: an entire scan chain or intermediate data result. In a Trojan-detection context, DFT logic may be regarded as an encryption algorithm: using the DFT input as key to sign a message derived from the behavior of the design under test. In an intrusion-avoidance context, BIST or DFT functions are typically disabled (by hardware-reconfiguration) outside of a manufacturing environment because their access to the chip's internal state can expose its function to covert surveillance or subversive attack.

Side channel analyses[edit]

Every device that is electrically active emits different signals like magnetic and electric fields. Those signals, that are caused by the electric activity, can be analyzed to gain information about the state and the data which the device processes. Advanced methods to measure these side-effects have been developed and they are very sensitive (side-channel attack). Hence, it is possible to detect tightly coupled Trojans via measurement of this analog signals. The measured values can be used as a signature for the analyzed device. It is also common that a set of measured values is evaluated to avoid measurement errors or other inaccuracies.

See also[edit]

External links[edit]

Further reading[edit]

  • Mainak Banga and Michael S. Hsiao: A Region Based Approach for the Identification of Hardware Trojans, Bradley Department of Electrical and Computer Engineering, Virginia Tech., Host'08, 2008
  • A. L. D’Souza and M. Hsiao: Error diagnosis of sequential circuits using region-based model, Proceedings of the IEEE VLSI Design Conference, January, 2001, pp. 103–108.
  • C. Fagot, O. Gascuel, P. Girard and C. Landrault: On Calculating Efficient LFSR Seeds for Built-In Self Test, Proc. Of European Test Workshop, 1999, pp 7–14
  • G. Hetherington, T. Fryars, N. Tamarapalli, M. Kassab, A. Hassan and J. Rajski: Logic BIST for large industrial designs, real issues and case studies, ITC, 1999, pp. 358–367
  • W. T. Cheng, M. Sharma, T. Rinderknecht and C. Hill: Signature Based Diagnosis for Logic BIST, ITC 2006, Oct. 2006, pp. 1–9
  • Rajat Subhra Chakraborty, Somnath Paul and Swarup Bhunia: On-Demand Transparency for Improving Hardware Trojan Detectability, Department of Electrical Engineering and Computer Science, Case Western Reserve University, Cleveland, OH, USA
  • Yier Jin and Yiorgos Makris: Hardware Trojan Detection Using Path Delay Fingerprint, Department of Electrical Engineering Yale University, New Haven
  • Reza Rad, Mohammad Tehranipoor and Jim Plusquellic: Sensitivity Analysis to Hardware Trojans using Power Supply Transient Signals, 1st IEEE International Workshop on Hardware-Oriented Security and Trust (HOST'08), 2008
  • Dakshi Agrawal, Selcuk Baktir, Deniz Karakoyunlu, Pankaj Rohatgi and Berk Sunar: Trojan Detection using IC Fingerprinting, IBM T.J. Watson Research Center, Yorktown Heights, Electrical \& Computer Engineering Worcester Polytechnic Institute, Worcester, Massachusetts, Nov 10, 2006
  • P. Song, F. Stellari, D. Pfeiffer, J. Culp, A. Weger, A. Bonnoit, B. Wisnieff, T. Taubenblatt: MARVEL - Malicious Alteration Recognition and Verification by Emission of Light,IEEE Int. Symp. on Hardware-Oriented Security and Trust (HOST), pp. 117–121, 2011
  • Xiaoxiao Wang, Mohammad Tehranipoor and Jim Plusquellic: Detecting Malicious Inclusions in Secure Hardware, Challenges and Solutions, 1st IEEE International Workshop on Hardware-Oriented Security and Trust (HOST'08), 2008
  • Miron Abramovici and Paul Bradley: Integrated Circuit Security - New Threats and Solutions
  • Zheng Gong and Marc X. Makkes: Hardware Trojan Side-channels Based on Physical Unclonable Functions - Information Security Theory and Practice. Security and Privacy of Mobile Devices in Wireless Communication 2011, Lecture Notes in Computer Science 6633, P294-303.


  1. ^ Zeng Gong and Marc X. Makkes "Hardware Trojan side-channels based on physical unclonable functions", WISTP 2011, LNCS 6633 pp.293-303 doi:10.1007/978-3-642-21040-2_21
  2. ^ J. Clark, S. Leblanc, S. Knight, Compromise through USB-based Hardware Trojan device, Future Generation Computer Systems (2010) (In Press). doi:10.1016/j.future.2010.04.008
  3. ^ John Clark, Sylvain Leblanc, Scott Knight, "Hardware Trojan Device Based on Unintended USB Channels," Network and System Security, International Conference on, pp. 1-8, 2009 Third International Conference on Network and System Security, 2009. doi:10.1109/NSS.2009.48
  4. ^ Swapp, Susan. "Scanning Electron Microscopy (SEM)". University of Wyoming. 
  5. ^ Zeng Gong and Marc X. Makkes "Hardware Trojan side-channels based on physical unclonable functions", WISTP 2011, LNCS 6633 pp.293-303 doi:10.1007/978-3-642-21040-2_21