Talk:64b/66b encoding

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DC Balance[edit]

As I understand it the statement "This means that there are just as many 1s as 0s in a string of two symbols, and that there are not too many 1s or 0s in a row" is not correct. This is true for 8b/10b encoding as the rigid encoding ensures DC balance over two symbols. My understanding is that 64b/66b encoding will have DC balance due to the averaging effect of the scrambling, but it is not guaranteed over two symbols. —Preceding unsigned comment added by (talk) 16:25, 24 August 2010 (UTC)

intentional DC balance violations[edit]

The initial state of the scrambler is known, the transformation function of the scrambler is also known. So it should be possible to send chosen payload that modifies the scrambler state in a way that it outputs only 0x00000000 or 0xFFFFFFFF and violates DC balance a lot. Are there any known attacs based on this? What would happen on a 10GbE-Link in this case? --RokerHRO (talk) 09:53, 16 March 2015 (UTC)

Scrambling polynomial[edit]

"128b/130b (...) uses a different scrambling polynomial: x23 + x21 + x16 + x8 + x5 + x2 + 1" – different to what? No other LFSR polynomial is mentioned in the article. Maybe it should be specified which polynomial is used, or at least its length. —Cousteau (talk) 05:39, 12 May 2015 (UTC)