Talk:Instruction pipelining

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Why does "superpipelined" redirect here?[edit]

Not used or defined in article. 86.159.197.174 (talk) 17:28, 26 August 2014 (UTC)

Note that page's history. It was a separate article until 2005, when it was redirected here. I take it that "superpipelining" is a follow-on technique to pipelining, in which the most time-consuming individual stages are replaced by multiple stages, each of which is shorter in duration and presumably can be executed in parallel. Spike-from-NH (talk) 21:23, 26 August 2014 (UTC)

Negation missing?[edit]

While reading the page, I saw this sentence:

It therefore allows faster CPU throughput (the number of instructions that can be executed in a unit of time) than would otherwise be possible at a given clock rate.

Shouldn't that be "wouldn't otherwise be possible"? Seems confusing to me. — Preceding unsigned comment added by V shashenko (talkcontribs) 08:32, 21 June 2016 (UTC)

Hello! The sentence is fine, it compares the pipelined (first part of the sentence) and non-pipelined (the second part) instruction throughputs. Hopefully, this will make it more clear. — Dsimic (talk | contribs) 08:48, 21 June 2016 (UTC)
The need for a negative in constructions like this is a rule of some languages other than English (here I presume Russian). This is also true in Spanish. In English, the hypothetical clause of a comparison is not negated. There is a way to write it not as a comparison: "allows fast CPU throughput...that would not otherwise be possible." But the sentence is fine. Spike-from-NH (talk) 14:56, 22 December 2016 (UTC)

"frequently used in CPUs but avoided in real-time systems"[edit]

Aren't most CPUs now pipelined, and aren't most real-time systems based on CPUs? See "11-stage pipeline on the Cortex-R7", for example... 46.218.234.67 (talk) 14:20, 22 December 2016 (UTC)

The comment is well-taken. This sentence ends, "in which latency is a hard constraint." I worked on processors where latency was a hard constraint, and even conditional execution could disturb refresh of the display monitor and make the image jitter. That was last century, and in the real world, the "hard constraint" between the start and end of an instruction is made insignificant by producing a processor that is one hundred times faster. I'll reword this paragraph. Spike-from-NH (talk) 14:39, 22 December 2016 (UTC)

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