Talk:Intel 8008

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0.5 MHz?[edit]

I was pretty sure that the base clock for the 8008 was 1 MHz, and 1.6 MHz for the 8008-1. Unfortunately, my original documentation is in a packing case somewhere in the shed. Can anybody confirm?

In any case, just stating the clock is misleading. The fastest instructions on the 8008 took 20μs, and the slowest were 44μs. I'm pretty sure that this was the number of clock cycles. Groogle (talk) 01:48, 31 December 2007 (UTC)

My guess (I'm 42) is that your clock frequency numbers are the Ø1 and Ø2 two-phase clock supplied to the 8008, while the numbers in the article are the SYNC clock output from the 8008. Still, I'm not sure how 5T and 11T respectively (from the data sheet) would end up as 20 and 44 [some unit], as this is a factor of four, not two as one would have expected. Perhaps your "development system" used a single-phase clock at twice the frequency in order to generate the two-phase clock for the 8008 (which is then in turn divided by 2 into T-states by the 8008)? That would explain it. HenkeB (talk) 16:50, 13 January 2008 (UTC)

In the two-phase clock generator that I used in the nine-chip microcomputer shown on: I used a 1.6 MHz clock to feed the flip-flop. Obviously the output of the flip-flop is half of the input frequency. The actual full cycle frequency was only 500 kHz for the 8008 and 800 kHz for the 8008-1. Donald P. Martin —Preceding unsigned comment added by (talk) 16:09, 11 August 2009 (UTC)

Instruction execution time[edit]

Was 8008 the first microprocessor ever to breach the microsecond barrier for execution of a singular machine instruction?Anwar (talk) 19:25, 7 May 2008 (UTC)

No. HenkeB (talk) 00:18, 8 May 2008 (UTC)

Similarity with x86[edit]

The article says:

The subsequent Intel 8080 and 8085 CPUs were also heavily based on the same basic design; even the x86 architecture (originally a non-strict extension of the 8085) loosely resembles the original Datapoint 2200 design (every instruction of the 8008's instruction set has a direct equivalent in the 8080's larger instruction set and Intel Core 2's even larger instruction set, although the opcode values are different in all three).

However, the 8008 had conditional call instructions[1], but x86 does not[2]. Can someone familiar with the 8008, 8080, and 8086 correct this sentence? (talk) 02:35, 19 November 2009 (UTC)

"the 8008 had conditional call instructions". This is correct. Actually the original architectural design (by Vic Poor and Harry Pyle) as provided by Datapoint to Intel (and TI) did not have conditional call and return and also, was BigEndian!

It was an Intel designer (sorry I don't know who) who requested these two changes. Both, to lower the transistor count of the 8008. Making the machine Little Endian meant the 8 byte LSB of an address did not have to be stored internally under various execution situations, but only a carry flag. Making conditional call and return meant that all PC modifying instructions were conditional, saving transistors.

Aside: Datapoint internally took great advantage of conditional call and return to nicely optimize their assembly code. EX: A standard was developed that if a subroutine returned with the carry flag set, there was an error. Tests would then be written so that carry is set on error, and immediately follow this logic with the "RTC" instruction (Return True Carry), a very space & time optimal sequence. (talk) 17:16, 19 May 2011 (UTC)HenriS

Datapoint screen like IBM 029?[edit]

used a video screen shaped to be the same aspect ratio as the IBM 029 punched card terminal.

Interesting, because neither the 029 nor the follow-on 129 had a screen at all. Honest. —Preceding unsigned comment added by MaggieL (talkcontribs) 20:53, 2 August 2010 (UTC)

The sentence being referred to "The case, ... an IBM punch card." (not punched card) can be taken, by location and context, to refer to the Datapoint 3300 but it does not. On the other hand, it is an accurate statement about the 2200! This may need to be clarified.

(said another way) The comment was not referring to the 029 card punch machine but to the card itself. In either case, it is incorrect. The Datapoint 3300 had a 25 line display, very similar to the 4:3 size ratio of standard monitors (pre wide-screen). On the other hand, the display of the Datapoint 2200 was only 12 lines by 80 characters. This is sized closer to a 'punch card' (13 punch rows by 80 columns) and may be where the (incorrect) idea came from. (talk) 16:58, 19 May 2011 (UTC)HenriS

Who's first? General Mills or Pillsbury Foods[edit]

The article contains "with their first sale to General Mills on May 25, 1970". To my understanding, the first customer was actually "Pillsbury Foods" as mentioned in the Datapoint 2200 article. This was related to me by Jonathan Schmidt, Datapoint's VP of R&D.

As I was told, the original intent of the 8008/2200 processor was as a terminal emulator, not a general purpose computer. I.E. it was to be used to perform communication protocol handling. That way, the same machine could be used to communicate with IBM, DEC, Univac, GE, Burroughs, etc. computers which used different control codes.

Pilsbury, when they got their first machines, immediately started programming them as personal business computers. Seeing this, Datapoint decided to rewrite their history and say that was their intent all along. They then proceeded to create related software a DOS, BASIC, DATABUS, etc. (talk) 17:41, 19 May 2011 (UTC)HenriS

Emulator / Assembler[edit]

I wrote a small free open-source Intel 8008 emulator and assembler to celebrate its 40th anniversay! :) (talk) 00:01, 9 April 2012 (UTC)

The actual source to a later product, the Datapoint 1800 & 3800 is archived at Datapoint 1800 & 3800 firmware (talk) 06:54, 27 February 2016 (UTC) - HenriS


This Intel 8008 article mentions T-states. The Zilog Z80 article mentions T-cycles. What are T-states? Are T-cycles the same thing, and if not, what are they? Are T-cycles something only relevant to the Zilog Z80, and T-states only relevant to the Intel 8008, or are they something relevant to many different CPU designs and so should be mentioned and defined in the CPU design article? --DavidCary (talk) 05:23, 9 March 2014 (UTC)

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