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There is some false information about behavioral synthesis and high level synthesis here. These are NOT the same. Also, the terms behavioral and high level refer to the *abstraction level* not to the *language* used to write the model, which is totally different. For instance it is possible to write both TLM and RTL models using SystemC, TLM ones are NOT synthesizable. —Preceding unsigned comment added by 18.104.22.168 (talk) 21:42, 3 February 2009 (UTC)
Xilinx ISE synthesis software proposed for deletion!