History of supercomputing: Difference between revisions
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[[Image:Cray-1-deutsches-museum.jpg|thumb|A [[Cray-1]] supercomputer preserved at the [[Deutsches Museum]]]] |
[[Image:Cray-1-deutsches-museum.jpg|thumb|A [[Cray-1]] supercomputer preserved at the [[Deutsches Museum]]]] |
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The '''history of [[supercomputing]]''' goes back to the early 1920s in the United States with the IBM tabulators at [[Columbia University]] and a series of computers at [[Control Data Corporation]] (CDC), designed by [[Seymour Cray]] to use innovative designs and parallelism to achieve superior computational peak performance.<ref name=chen > |
The '''history of [[supercomputing]]''' goes back to the early 1920s in the United States with the IBM tabulators at [[Columbia University]] and a series of computers at [[Control Data Corporation]] (CDC), designed by [[Seymour Cray]] to use innovative designs and parallelism to achieve superior computational peak performance.<ref name=chen >{{cite book | title = Hardware software co-design of a multimedia SOC platform | first1 = Sao-Jie | last1 = Chen | first2 = Guang-Huei | last2 = Lin | first3 = Pao-Ann | last3 = Hsiung | first4 = Yu-Hen | last4 = Hu | year = 2009 | ISBN = 9781402096235 | pages = 70-72 | url = https://books.google.com/books?id=OXyo3om9ZOkC&pg=PA70 | publisher = [[Springer Science+Business Media]] | access-date = 20 February 2018}}</ref> The [[CDC 6600]], released in 1964, is generally considered the first supercomputer.<ref>{{cite book | title= History of computing in education | first1= John | last1= Impagliazzo | first2= John A. N. | last2= Lee | year= 2004 | ISBN = 1-4020-8135-9 | page = 172 |url =https://books.google.com/books?id=SzTTBwAAQBAJ&pg=PA172 | access-date= 20 February 2018}}</ref><ref>{{cite book |title= The American Midwest: an interpretive encyclopedia |first1= Richard |last1= Sisson |first2=Christian K. |last2= Zacher | year = 2006 | ISBN = 0-253-34886-2 | page = 1489 | url = https://books.google.com/books?id=n3Xn7jMx1RYC&pg=PA1489 }}</ref> However, some earlier computers were considered supercomputers for their day, such as the 1960 [[UNIVAC LARC]]<ref>{{cite book | first1=David E. | last1=Lundstrom | title=A Few Good Men from UNIVAC | publisher=MIT Press | year=1984 | url=https://books.google.com/books?id=CK4LAAAACAAJ | access-date=20 February 2018}}</ref>, the 1954 [[IBM Naval Ordnance Research Calculator|IBM NORC]]<ref>{{cite web | url = http://www.columbia.edu/cu/computinghistory/norc.html | title = IBM NORC | author = Frank da Cruz | orig-year = 2004 | date = 25 October 2013 | access-date = 20 February 2018}}</ref>, and the [[IBM 7030 Stretch]] and the [[Atlas (computer)|Atlas]], both in 1962. |
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While the supercomputers of the 1980s used only a few processors, in the 1990s, machines with thousands of processors began to appear both in the United States and in Japan, setting new computational performance records. |
While the supercomputers of the 1980s used only a few processors, in the 1990s, machines with thousands of processors began to appear both in the United States and in Japan, setting new computational performance records. |
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The term "Super Computing" was first used in the ''[[New York World]]'' in 1929 to refer to large custom-built tabulators that [[IBM]] had made for [[Columbia University]]. |
The term "Super Computing" was first used in the ''[[New York World]]'' in 1929 to refer to large custom-built tabulators that [[IBM]] had made for [[Columbia University]]. |
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In 1957 a group of engineers left [[Sperry Corporation]] to form [[Control Data Corporation]] (CDC) in [[Minneapolis]], MN. [[Seymour Cray]] left Sperry a year later to join his colleagues at CDC.<ref name=chen /> In 1960 Cray completed the [[CDC 1604]], one of the first [[solid state (electronics)|solid state]] computers, and the fastest computer in the world{{dubious|date=January 2014}} at a time when [[vacuum tubes]] were found in most large computers.<ref name=Hannan > |
In 1957 a group of engineers left [[Sperry Corporation]] to form [[Control Data Corporation]] (CDC) in [[Minneapolis]], MN. [[Seymour Cray]] left Sperry a year later to join his colleagues at CDC.<ref name=chen /> In 1960 Cray completed the [[CDC 1604]], one of the first [[solid state (electronics)|solid state]] computers, and the fastest computer in the world{{dubious|date=January 2014}} at a time when [[vacuum tubes]] were found in most large computers.<ref name=Hannan >{{cite book | title = Wisconsin Biographical Dictionary | first = Caryn | last = Hannan | year = 2008 | ISBN = 1-878592-63-7 | pages = 83-84 | url = https://books.google.com/books?id=V08bjkJeXkAC&pg=PA83 | access-date = 20 February 2018}}</ref> |
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[[File:CDC 6600 introduced in 1964.jpg|thumb|left|180px|The [[CDC 6600]] with the system console]] |
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Around 1960 Cray decided to design a computer that would be the fastest in the world by a large margin. After four years of experimentation along with Jim Thornton, and Dean Roush and about 30 other engineers Cray completed the [[CDC 6600]] in 1964. Cray switched from germanium to silicon transistors, built by [[Fairchild Semiconductor]], that used the planar process. These did not have the drawbacks of the mesa silicon transistors. He ran them very fast, and the speed of light restriction forced a very compact design with severe overheating problems, which were solved by introducing refrigeration, designed by Dean Roush.<ref name="The Supermen 1997"> |
Around 1960 Cray decided to design a computer that would be the fastest in the world by a large margin. After four years of experimentation along with Jim Thornton, and Dean Roush and about 30 other engineers Cray completed the [[CDC 6600]] in 1964. Cray switched from germanium to silicon transistors, built by [[Fairchild Semiconductor]], that used the planar process. These did not have the drawbacks of the mesa silicon transistors. He ran them very fast, and the speed of light restriction forced a very compact design with severe overheating problems, which were solved by introducing refrigeration, designed by Dean Roush.<ref name="The Supermen 1997">{{cite book | title = The Supermen | first = Charles J. | last = Murray | publisher = Wiley & Sons | year = 1997 | url = https://books.google.com/books?id=VsA86kiUkC0C}}</ref> Given that the 6600 outran all computers of the time by about 10 times, it was dubbed a ''supercomputer'' and defined the supercomputing market when one hundred computers were sold at $8 million each.<ref name=Hannan /><ref>{{cite book | title = A history of modern computing | first = Paul E. | last = Ceruzzi | year = 2003 | ISBN = 978-0-262-53203-7 | page = 161 | url = https://books.google.com/books?id=x1YESXanrgQC&pg=PA161 | access-date = 20 February 2018}}</ref> |
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The 6600 gained speed by "farming out" work to peripheral computing elements, freeing the CPU (Central Processing Unit) to process actual data. The Minnesota [[FORTRAN]] compiler for the machine was developed by Liddiard and Mundstock at the [[University of Minnesota]] and with it the 6600 could sustain 500 kiloflops on standard mathematical operations.<ref>Frisch |
The 6600 gained speed by "farming out" work to peripheral computing elements, freeing the CPU (Central Processing Unit) to process actual data. The Minnesota [[FORTRAN]] compiler for the machine was developed by Liddiard and Mundstock at the [[University of Minnesota]] and with it the 6600 could sustain 500 kiloflops on standard mathematical operations.<ref>{{cite journal | doi = 10.1145/361598.361914 | last =Frisch | first = Michael J. | date = December 1972 | title = Remarks on algorithm 352 [S22], algorithm 385 [S13], algorithm 392 [D3] | journal = Communications of the ACM | volume = 15 | issue = 12 | page = 1074}}</ref> In 1968 Cray completed the [[CDC 7600]], again the fastest computer in the world.<ref name=Hannan /> At 36 [[Hertz|MHz]], the 7600 had about three and a half times the [[clock speed]] of the 6600, but ran significantly faster due to other technical innovations. They sold only about 50 of the 7600s, not quite a failure. Cray left CDC in 1972 to form his own company.<ref name=Hannan /> Two years after his departure CDC delivered the [[CDC STAR-100|STAR-100]] which at 100 megaflops was three times the speed of the 7600. Along with the [[Texas Instruments ASC]], the STAR-100 was one of the first machines to use [[vector processing]] - the idea having been inspired around 1964 by the [[APL programming language]].<ref>{{cite book | title = An Introduction to high-performance scientific computing | first = Lloyd Dudley | last = Fosdick | year = 1996 | ISBN = 0-262-06181-3 | page = 418 | url = https://books.google.com/books?id=u1dyR3_8NycC&pg=PA418 | publisher = MIT Press}}</ref><ref name=Hill41 /> |
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[[File:University of Manchester Atlas, January 1963.JPG|thumb|The University of Manchester [[Atlas (computer)|Atlas]] in January 1963.]] |
[[File:University of Manchester Atlas, January 1963.JPG|thumb|The University of Manchester [[Atlas (computer)|Atlas]] in January 1963.]] |
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In 1956, a team at [[Manchester University]] in the United Kingdom, began development of MUSE — a name derived from [[microsecond]] engine — with the aim of eventually building a computer that could operate at processing speeds approaching one microsecond per instruction, about one million [[instructions per second]].<ref>{{ |
In 1956, a team at [[Manchester University]] in the United Kingdom, began development of MUSE — a name derived from [[microsecond]] engine — with the aim of eventually building a computer that could operate at processing speeds approaching one microsecond per instruction, about one million [[instructions per second]].<ref>{{cite web |title=The Atlas |url=http://www.computer50.org/kgill/atlas/atlas.html |publisher=University of Manchester |accessdate=21 September 2010 |deadurl=yes |archiveurl=https://web.archive.org/web/20120728105352/http://www.computer50.org/kgill/atlas/atlas.html |archivedate=28 July 2012 }}</ref> ''Mu'' (or ''µ'') is a prefix in the SI and other systems of units denoting a factor of 10<sup>−6</sup> (one millionth). |
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At the end of 1958 Ferranti agreed to begin to collaborate with Manchester University on the project, and the computer was shortly afterwards renamed [[Atlas (computer)|Atlas]], with the joint venture under the control of [[Tom Kilburn]]. The first Atlas was officially commissioned on 7 December 1962, nearly three years before the Cray CDC 6600 supercomputer was introduced, as one of the world's first [[supercomputers]] - and was considered to be the most powerful computer in England and for a very short time was considered to be one of the most powerful computers in the world, and equivalent to four [[IBM 7094]]s.<ref name=Lavington>{{ |
At the end of 1958 Ferranti agreed to begin to collaborate with Manchester University on the project, and the computer was shortly afterwards renamed [[Atlas (computer)|Atlas]], with the joint venture under the control of [[Tom Kilburn]]. The first Atlas was officially commissioned on 7 December 1962, nearly three years before the Cray CDC 6600 supercomputer was introduced, as one of the world's first [[supercomputers]] - and was considered to be the most powerful computer in England and for a very short time was considered to be one of the most powerful computers in the world, and equivalent to four [[IBM 7094]]s.<ref name=Lavington>{{cite book |last=Lavington |first=Simon Hugh |title=A History of Manchester Computers |year=1998 |edition=2 |publisher=The British Computer Society |location=Swindon |isbn=978-1-902505-01-5 |pages=41–52 |url=https://books.google.com/books?id=rVnxAAAAMAAJ}}</ref> It was said that whenever England's Atlas went offline half of the United Kingdom's computer capacity was lost.<ref name=Lavington /> The Atlas pioneered the use of [[virtual memory]] and [[paging]] as a way to extend the Atlas's working memory by combining its 16,384 words of primary [[magnetic core memory|core memory]] with an additional 96K words of secondary [[drum memory]].<ref>{{citation | first = R. J. | last = Creasy | url = http://pages.cs.wisc.edu/~stjones/proj/vm_reading/ibmrd2505M.pdf | format = PDF | title = The Origin of the VM/370 Time-Sharing System | work = IBM Journal of Research & Development | volume = 25 | number = 5 | date = September 1981 | p = 486 }}</ref> Atlas also pioneered the [[Atlas Supervisor]], "considered by many to be the first recognizable modern [[operating system]]".<ref name=Lavington /> |
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==The Cray era: mid-1970s and 1980s== |
==The Cray era: mid-1970s and 1980s== |
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[[File:Cray2.jpeg|thumb|A liquid cooled [[Cray-2]] supercomputer]] |
[[File:Cray2.jpeg|thumb|A liquid cooled [[Cray-2]] supercomputer]] |
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Four years after leaving CDC, Cray delivered the 80 MHz [[Cray 1]] in 1976, and it became the most successful supercomputer in history.<ref name=Hill41> |
Four years after leaving CDC, Cray delivered the 80 MHz [[Cray 1]] in 1976, and it became the most successful supercomputer in history.<ref name=Hill41>{{cite book | title = Readings in computer architecture | first1 = Mark Donald | last1 = Hill | first2 = Norman Paul | last2 = Jouppi | first3 = Gurindar | last3 = Sohi | year = 1999 | ISBN = 978-1-55860-539-8 | page = 41-48}}</ref><ref name=Edwin65 /> The Cray 1 used integrated circuits with two gates per chip and was a [[vector processor]] which introduced a number of innovations such as [[chaining (vector processing)|chaining]] in which scalar and vector registers generate interim results which can be used immediately, without additional memory references which reduce computational speed.<ref name="The Supermen 1997"/><ref name=Tokhi >{{cite book | title = Parallel computing for real-time signal processing and control | first1 = M. O. | last1 = Tokhi | first2 = Mohammad Alamgir | last2 = Hossain | year = 2003 | ISBN = 978-1-85233-599-1 | pages = 201-202}}</ref> The [[Cray X-MP]] (designed by [[Steve Chen (computer engineer)|Steve Chen]]) was released in 1982 as a 105 MHz shared-memory [[Parallel computing|parallel]] [[vector processor]] with better chaining support and multiple memory pipelines. All three floating point pipelines on the X-MP could operate simultaneously.<ref name=Tokhi /> |
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The [[Cray-2]] released in 1985 was a 4 processor [[Computer cooling|liquid cooled]] computer totally immersed in a tank of [[Fluorinert]], which bubbled as it operated.<ref name=" |
The [[Cray-2]] released in 1985 was a 4 processor [[Computer cooling|liquid cooled]] computer totally immersed in a tank of [[Fluorinert]], which bubbled as it operated.<ref name="The Supermen 1997" /> It could perform to 1.9 gigaflops and was the world's second fastest supercomputer after M-13 (2.4 gigaflops)<ref>{{cite web | url = http://www.icfcst.kiev.ua/MUSEUM/Kartsev.html | title = Mikhail A.Kartsev - Developer of Super-Computers for Space Observation | orig-year = 1998 | year = 2018 | publisher = ICFCST | access-date = 20 February 2018}}</ref> until 1990 when [[ETA10|ETA-10G]] from CDC overtook both. The Cray 2 was a totally new design and did not use chaining and had a high memory latency, but used much pipelining and was ideal for problems that required large amounts of memory.<ref name=Tokhi /> The software costs in developing a supercomputer should not be underestimated, as evidenced by the fact that in the 1980s the cost for software development at Cray came to equal what was spent on hardware.<ref name=MacKenzie >{{cite book | title = Knowing machines: essays on technical change | first = Donald | last = MacKenzie | year = 1998 | ISBN = 0-262-63188-1 | page = 149-151}}</ref> That trend was partly responsible for a move away from the in-house, [[Cray Operating System]] to [[UNICOS]] based on [[Unix]].<ref name=MacKenzie /> |
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The [[Cray Y-MP]], also designed by Steve Chen, was released in 1988 as an improvement of the X-MP and could have eight [[vector processors]] at 167 MHz with a peak performance of 333 megaflops per processor.<ref name=Tokhi /> In the late 1980s, Cray's experiment on the use of [[gallium arsenide]] semiconductors in the [[Cray-3]] did not succeed. Cray began to work on a [[MIMD|massively parallel]] computer in the early 1990s, but died in a car accident in 1996 before it could be completed. Cray Research did, however, produce such computers.<ref name=Edwin65 > |
The [[Cray Y-MP]], also designed by Steve Chen, was released in 1988 as an improvement of the X-MP and could have eight [[vector processors]] at 167 MHz with a peak performance of 333 megaflops per processor.<ref name=Tokhi /> In the late 1980s, Cray's experiment on the use of [[gallium arsenide]] semiconductors in the [[Cray-3]] did not succeed. Cray began to work on a [[MIMD|massively parallel]] computer in the early 1990s, but died in a car accident in 1996 before it could be completed. Cray Research did, however, produce such computers.<ref name=Edwin65 >{{cite book | title = Milestones in computer science and information technology | first = Edwin D. | last = Reilly | year = 2003 | ISBN = 1-57356-521-0 | page = 65}}</ref><ref name="The Supermen 1997"/> |
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==Massive processing: the 1990s== |
==Massive processing: the 1990s== |
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[[File:Paragon XP-E - mesh.jpg|thumb|left|180px|Rear of the [[Intel Paragon|Paragon]] cabinet showing the bus bars and mesh routers]] |
[[File:Paragon XP-E - mesh.jpg|thumb|left|180px|Rear of the [[Intel Paragon|Paragon]] cabinet showing the bus bars and mesh routers]] |
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The [[SX-3 supercomputer|SX-3/44R]] was announced by [[NEC Corporation]] in 1989 and a year later earned the fastest in the world title with a 4 processor model.<ref> |
The [[SX-3 supercomputer|SX-3/44R]] was announced by [[NEC Corporation]] in 1989 and a year later earned the fastest in the world title with a 4 processor model.<ref>{{cite book | title = Computing methods in applied sciences and engineering | first1 = R. | last1 = Glowinski | first2 = A. | last2 = Lichnewsky | ISBN = 0-89871-264-5 | pages = 353-360}}</ref> However, Fujitsu's [[Numerical Wind Tunnel]] supercomputer used 166 vector processors to gain the top spot in 1994. It had a peak speed of 1.7 gigaflops per processor.<ref>{{cite web | url = http://www.netlib.org/benchmark/top500/reports/report94/main.html | title = TOP500 Annual Report 1994 | date = 1 October 1996}}</ref><ref>{{Cite conference |first1=N. |last1= Hirose |first2= M. |last2= Fukuda |year=1997 |title=Numerical Wind Tunnel (NWT) and CFD Research at National Aerospace Laboratory |conference=Proceedings of HPC-Asia '97 |publisher=IEEE Computer Society |doi=10.1109/HPC.1997.592130}}</ref> The [[Hitachi SR2201]] on the other hand obtained a peak performance of 600 gigaflops in 1996 by using 2048 processors connected via a fast three-dimensional [[crossbar switch|crossbar]] network.<ref>{{cite conference | first1 = H. | last1 = Fujii | first2 = Y. | last2 = Yasuda | first3 = H. | last3 = Akashi | first4 = Y. | last4 = Inagami | first5 = M. | last5 = Koga | first6 = O. | last6 = Ishihara | first7 = M. | last7 = Kashiyama | first8 = H. | last8 = Wada | first9 = T. | last9 = Sumimoto | title = Architecture and performance of the Hitachi SR2201 massively parallel processor system |work = Proceedings of 11th International Parallel Processing Symposium | date = April 1997 | pages = 233-241 | doi = 10.1109/IPPS.1997.580901}}</ref><ref>{{cite conference | first = Y. | last = Iwasaki | title = The CP-PACS project | work = Nuclear Physics B - Proceedings Supplements | volume = 60 | issue = 1-2 | date = January 1998 | pages = 246-254 | doi = 10.1016/S0920-5632(97)00487-8}}</ref><ref>A.J. van der Steen, Overview of recent supercomputers, Publication of the NCF, Stichting Nationale Computer Faciliteiten, the Netherlands, January 1997.</ref> |
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|author=N. Hirose and M. Fukuda |
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|year=1997 |
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|title=Numerical Wind Tunnel (NWT) and CFD Research at National Aerospace Laboratory |
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|conference=Proceedings of HPC-Asia '97 |
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|publisher=IEEE Computer Society |
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|doi=10.1109/HPC.1997.592130 |
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}}</ref> The [[Hitachi SR2201]] on the other hand obtained a peak performance of 600 gigaflops in 1996 by using 2048 processors connected via a fast three-dimensional [[crossbar switch|crossbar]] network.<ref>H. Fujii, Y. Yasuda, H. Akashi, Y. Inagami, M. Koga, O. Ishihara, M. Kashiyama, H. Wada, T. Sumimoto, Architecture and performance of the Hitachi SR2201 massively parallel processor system, Proceedings of 11th International Parallel Processing Symposium, April 1997, Pages 233-241.</ref><ref>Y. Iwasaki, The CP-PACS project, Nuclear Physics B - Proceedings Supplements, Volume 60, Issues 1-2, January 1998, Pages 246-254.</ref><ref>A.J. van der Steen, Overview of recent supercomputers, Publication of the NCF, Stichting Nationale Computer Faciliteiten, the Netherlands, January 1997.</ref> |
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In the same timeframe the [[Intel Paragon]] could have 1000 to 4000 [[Intel i860]] processors in various configurations, and was ranked the fastest in the world in 1993. The Paragon was a [[MIMD]] machine which connected processors via a high speed two-dimensional mesh, allowing processes to execute on separate nodes; communicating via the [[Message Passing Interface]].<ref> |
In the same timeframe the [[Intel Paragon]] could have 1000 to 4000 [[Intel i860]] processors in various configurations, and was ranked the fastest in the world in 1993. The Paragon was a [[MIMD]] machine which connected processors via a high speed two-dimensional mesh, allowing processes to execute on separate nodes; communicating via the [[Message Passing Interface]].<ref>{{cite book | title = Scalable input/output: achieving system balance | first = Daniel A. | last = Reed | year = 2003 | ISBN = 978-0-262-68142-1 | page = 182}}</ref> By 1995 Cray was also shipping massively parallel systems, e.g. the [[Cray T3E]] with over 2,000 processors, using a three-dimensional [[torus interconnect]].<ref>{{cite press release | title = Cray Sells First T3E-1350 Supercomputer to PhillipsPetroleum | agency = Business Wire | publisher = Gale Group | date = 7 August 2000 | url = https://www.thefreelibrary.com/Cray+Sells+First+T3E-1350+Supercomputer+to+Phillips+Petroleum.-a063900928 | location = Seattle }}</ref><ref name=Torus>{{cite journal|first=N. R.|last=Agida|collaboration = et al.|title=Blue Gene/L Torus Interconnection Network|work=[[IBM Journal of Research and Development]]|volume=45|number=2-3|date=March–May 2005|page=265|url=http://www.cc.gatech.edu/classes/AY2008/cs8803hpc_spring/papers/bgLtorusnetwork.pdf |accessdate=2012-02-09 |deadurl=yes |archiveurl=https://web.archive.org/web/20110815102821/http://www.cc.gatech.edu/classes/AY2008/cs8803hpc_spring/papers/bgLtorusnetwork.pdf |archivedate=2011-08-15 }}</ref> |
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The Paragon architecture soon led to the Intel [[ASCI Red]] supercomputer in the United States, which held the top supercomputing spot to the end of the 20th century as part of the [[Advanced Simulation and Computing Initiative]]. This was also a mesh-based MIMD massively-parallel system with over 9,000 compute nodes and well over 12 terabytes of disk storage, but used off-the-shelf [[Pentium Pro]] processors that could be found in everyday personal computers. ASCI Red was the first system ever to break through the 1 teraflop barrier on the MP-[[Linpack]] benchmark in 1996; eventually reaching 2 teraflops.<ref> |
The Paragon architecture soon led to the Intel [[ASCI Red]] supercomputer in the United States, which held the top supercomputing spot to the end of the 20th century as part of the [[Advanced Simulation and Computing Initiative]]. This was also a mesh-based MIMD massively-parallel system with over 9,000 compute nodes and well over 12 terabytes of disk storage, but used off-the-shelf [[Pentium Pro]] processors that could be found in everyday personal computers. ASCI Red was the first system ever to break through the 1 teraflop barrier on the MP-[[Linpack]] benchmark in 1996; eventually reaching 2 teraflops.<ref>{{cite journal | work = Algorithms for parallel processing | title = Enabling Department-Scale Supercomputing | volume = 105 | first = David S. | last = Greenberg | editor-first = Michael T. | editor-last = Heath | year = 1998 | ISBN = 0-387-98680-4 | page = 323 | url = https://books.google.ca/books?id=zo61nbirb_gC&pg=PA323 | access-date = 20 February 2018}}</ref> |
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==Petascale computing in the 21st century== |
==Petascale computing in the 21st century== |
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{{Main|Petascale computing}} |
{{Main|Petascale computing}} |
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[[Image:IBM Blue Gene P supercomputer.jpg|240px|thumb|A [[Blue Gene]]/P supercomputer at [[Argonne National Laboratory]]]] |
[[Image:IBM Blue Gene P supercomputer.jpg|240px|thumb|A [[Blue Gene]]/P supercomputer at [[Argonne National Laboratory]]]] |
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Significant progress was made in the first decade of the 21st century. The efficiency of supercomputers continued to increase, but not dramatically so. The [[Cray C90]] used 500 kilowatts of power in 1991, while by 2003 the [[ASCI Q]] used 3,000 kW while being 2,000 times faster, increasing the performance per watt 300 fold.<ref name=WuFeng>Wu-chun Feng |
Significant progress was made in the first decade of the 21st century. The efficiency of supercomputers continued to increase, but not dramatically so. The [[Cray C90]] used 500 kilowatts of power in 1991, while by 2003 the [[ASCI Q]] used 3,000 kW while being 2,000 times faster, increasing the performance per watt 300 fold.<ref name=WuFeng>{{cite journal | first = Wu-chun | last = Feng | year = 2003 | title = Making a Case for Efficient Supercomputing | magazine = ACM Queue Magazine | volume = 1 | issue = 7 | date = 1 October 2003 | doi = 10.1145/957717.957772 |url=http://sss.lanl.gov/pubs/031001-acmq.pdf |accessdate=6 February 2016 |deadurl=yes |archiveurl=https://web.archive.org/web/20120330182549/http://sss.lanl.gov/pubs/031001-acmq.pdf |archivedate=30 March 2012 }}</ref> |
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In 2004, the [[Earth Simulator]] supercomputer built by [[NEC]] at the Japan Agency for Marine-Earth Science and Technology (JAMSTEC) reached 35.9 teraflops, using 640 nodes, each with eight proprietary [[vector processor]]s.<ref>{{cite journal |
In 2004, the [[Earth Simulator]] supercomputer built by [[NEC]] at the Japan Agency for Marine-Earth Science and Technology (JAMSTEC) reached 35.9 teraflops, using 640 nodes, each with eight proprietary [[vector processor]]s.<ref>{{cite journal | first = Tetsuya | last = Sato | title = The Earth Simulator: Roles and Impacts | journal = Nuclear Physics B: Proceedings Supplements | page = 102 | volume = 129 | doi = 10.1016/S0920-5632(03)02511-8 | year = 2004}}</ref> |
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| first = Tetsuya |
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| last = Sato |
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| title = The Earth Simulator: Roles and Impacts |
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| journal = Nuclear Physics B: Proceedings Supplements |
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| pages = 102 |
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| volume = 129 |
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| doi = 10.1016/S0920-5632(03)02511-8 |
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| year = 2004 |
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}}</ref> |
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The [[IBM]] [[Blue Gene]] supercomputer architecture found widespread use in the early part of the 21st century, and 27 of the computers on the [[TOP500]] list used that architecture. The Blue Gene approach is somewhat different in that it trades processor speed for low power consumption so that a larger number of processors can be used at air cooled temperatures. It can use over 60,000 processors, with 2048 processors "per rack", and connects them via a three-dimensional torus interconnect.<ref> |
The [[IBM]] [[Blue Gene]] supercomputer architecture found widespread use in the early part of the 21st century, and 27 of the computers on the [[TOP500]] list used that architecture. The Blue Gene approach is somewhat different in that it trades processor speed for low power consumption so that a larger number of processors can be used at air cooled temperatures. It can use over 60,000 processors, with 2048 processors "per rack", and connects them via a three-dimensional torus interconnect.<ref>{{cite conference | title = Early Experience with Scientific Applications on the Blue Gene/L Supercomputer | first = George | last = Almasi | collaboration = et al. | work = Euro-Par 2005 parallel processing: 11th International Euro-Par Conference | editor-first1 = José Cardoso | editor-last1 = Cunha | editor-first2 = Pedro D. | editor-last2 = Medeiros | year = 2005 | ISBN = 978-3-540-28700-1 | pages = 560-567 | url = https://books.google.com/books?id=RCEHCAAAQBAJ&pg=PA560}}</ref><ref>{{cite news | title = IBM uncloaks 20 petaflops BlueGene/Q super | url = https://www.theregister.co.uk/2010/11/22/ibm_blue_gene_q_super/ | work = The Register | date = 22 November 2010 | first = Timothy Prickett | last = Morgan}}</ref> |
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Progress in [[China]] has been rapid, in that China placed 51st on the TOP500 list in June 2003, then 14th in November 2003, and 10th in June 2004 and then 5th during 2005, before gaining the top spot in 2010 with the 2.5 petaflop [[Tianhe-I]] supercomputer.<ref name=Graham >{{cite book | title = Getting up to speed: the future of supercomputing | first1 = Susan L. | last1 = Graham |first2 = Marc | last2 = Snir | first3 =Cynthia A. | last3 = Patterson | year = 2005 | isbn =0-309-09502-6 | page=188}}</ref><ref name=NYTimesTianhe > |
Progress in [[China]] has been rapid, in that China placed 51st on the TOP500 list in June 2003, then 14th in November 2003, and 10th in June 2004 and then 5th during 2005, before gaining the top spot in 2010 with the 2.5 petaflop [[Tianhe-I]] supercomputer.<ref name=Graham >{{cite book | title = Getting up to speed: the future of supercomputing | first1 = Susan L. | last1 = Graham |first2 = Marc | last2 = Snir | first3 =Cynthia A. | last3 = Patterson | year = 2005 | isbn =0-309-09502-6 | page=188}}</ref><ref name=NYTimesTianhe >{{cite news | url = http://www.nytimes.com/2010/10/28/technology/28compute.html | title = China Wrests Supercomputer Title From U.S. | work = New York Times | first = Ashlee | last = Vance | date = 28 October 2010 | access-date = 20 February 2018}}</ref> |
||
In July 2011, the 8.1 petaflop Japanese [[K computer]] became the fastest in the world using over 60,000 [[SPARC64 V#SPARC64 VIIIfx|SPARC64 VIIIfx]] processors housed in over 600 cabinets. The fact that K computer is over 60 times faster than the Earth Simulator, and that the Earth Simulator ranks as the 68th system in the world seven years after holding the top spot demonstrates both the rapid increase in top performance and the widespread growth of supercomputing technology worldwide.<ref name=tele20611>{{cite news|url=http://www.telegraph.co.uk/technology/news/8586655/Japanese-supercomputer-K-is-worlds-fastest.html|title=Japanese supercomputer 'K' is world's fastest|accessdate=20 June 2011|publisher=The Telegraph|date=20 June 2011}}</ref><ref name=nyt20611>{{cite news|url=https://www.nytimes.com/2011/06/20/technology/20computer.html|title=Japanese ‘K’ Computer Is Ranked Most Powerful|accessdate=20 June 2011|work=The New York Times|date=20 June 2011}}</ref><ref name=fujnr>{{cite web|url=http://www.fujitsu.com/global/news/pr/archives/month/2011/20110620-02.html|title=Supercomputer "K computer" Takes First Place in World|accessdate=20 June 2011|publisher=Fujitsu}}</ref> |
In July 2011, the 8.1 petaflop Japanese [[K computer]] became the fastest in the world using over 60,000 [[SPARC64 V#SPARC64 VIIIfx|SPARC64 VIIIfx]] processors housed in over 600 cabinets. The fact that K computer is over 60 times faster than the Earth Simulator, and that the Earth Simulator ranks as the 68th system in the world seven years after holding the top spot demonstrates both the rapid increase in top performance and the widespread growth of supercomputing technology worldwide.<ref name=tele20611>{{cite news|url=http://www.telegraph.co.uk/technology/news/8586655/Japanese-supercomputer-K-is-worlds-fastest.html|title=Japanese supercomputer 'K' is world's fastest|accessdate=20 June 2011|publisher=The Telegraph|date=20 June 2011}}</ref><ref name=nyt20611>{{cite news|url=https://www.nytimes.com/2011/06/20/technology/20computer.html|title=Japanese ‘K’ Computer Is Ranked Most Powerful|accessdate=20 June 2011|work=The New York Times|date=20 June 2011}}</ref><ref name=fujnr>{{cite web|url=http://www.fujitsu.com/global/news/pr/archives/month/2011/20110620-02.html|title=Supercomputer "K computer" Takes First Place in World|accessdate=20 June 2011|publisher=Fujitsu}}</ref> |
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==Historical TOP500 table== |
==Historical TOP500 table== |
||
This is a list of the computers which appeared at the top of the [[Top500]] list since 1993.<ref>{{cite web |
This is a list of the computers which appeared at the top of the [[Top500]] list since 1993.<ref>{{cite web |url=https://www.top500.org/statistics/sublist/ |title=Sublist Generator |publisher=Top500 |year=2017 |accessdate=20 February 2018}}</ref> The "Peak speed" is given as the "Rmax" rating. |
||
[[File:Supercomputers-history.svg|thumb|right|350px|Rapid growth of supercomputers performance, based on data from top500.org site. The logarithmic ''y''-axis shows performance in GFLOPS. |
[[File:Supercomputers-history.svg|thumb|right|350px|Rapid growth of supercomputers performance, based on data from top500.org site. The logarithmic ''y''-axis shows performance in GFLOPS. |
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| Line 185: | Line 169: | ||
==Export controls== |
==Export controls== |
||
The [[CoCom]] and its later replacement, the [[Wassenaar Arrangement]], legally regulated - required licensing and approval and record-keeping; or banned entirely - the export of [[high-performance computer]]s (HPCs) to certain countries. Such controls have become harder to justify, leading to loosening of these regulations. Some have argued these regulations were never justified.<ref> |
The [[CoCom]] and its later replacement, the [[Wassenaar Arrangement]], legally regulated - required licensing and approval and record-keeping; or banned entirely - the export of [[high-performance computer]]s (HPCs) to certain countries. Such controls have become harder to justify, leading to loosening of these regulations. Some have argued these regulations were never justified.<ref>{{cite book | url = http://www.princeton.edu/~ota/disk1/1994/9408/940810.PDF | section = Complexities of Setting Export Control Thresholds: Computers | title = Export controls and nonproliferation policy | publisher = DIANE Publishing | ISBN = 9781428920521 | date = May 1994}}</ref><ref>{{cite journal | first1 = Peter | last1 = Wolcott | first2 = Seymour | last2 = Goodman | first3 = Patrick | last3 = Homer | url = http://www.isqa.unomaha.edu/wolcott/Publications/vpcacm.htm | title = High Performance Computing Export Controls: Navigating Choppy Waters | work = Communications of the ACM | date = November 1998 | volume = 41 | issue = 11 | pages = 27-30 | doi = 10.1145/287831.287836 | location = New York, USA}}</ref><ref>{{cite report | first1 = Glenn J. | last1 = McLoughlin | first2 = Ian F. | last2 = Fergusson | url = http://www.fas.org/sgp/crs/RL31175.pdf | title = High Performance Computers and Export Control Policy | date = 10 February 2003}}</ref><ref>{{cite web | first = Seth | last = Brugger | url = http://www.armscontrol.org/act/2000_09/exportsept00 | title = U.S. Revises Computer Export Control Regulations | date = 1 September 2000 | website = [[Arms Control Association]]}}</ref><ref>{{cite web | url = https://www.federalregister.gov/articles/2011/06/24/2011-15842/export-controls-for-high-performance-computers-wassenaar-arrangement-agreement-implementation-for | title = Export Controls for High Performance Computers | date = 24 June 2011}}</ref><ref>{{cite news | first = Jeff | last = Blagdon | url = https://www.theverge.com/2013/5/30/4381592/us-removes-sanctions-on-computer-exports-to-iran | title = US removes sanctions on computer exports to Iran | date = 30 May 2013}}</ref> |
||
==See also== |
==See also== |
||
Revision as of 06:45, 21 February 2018
The history of supercomputing goes back to the early 1920s in the United States with the IBM tabulators at Columbia University and a series of computers at Control Data Corporation (CDC), designed by Seymour Cray to use innovative designs and parallelism to achieve superior computational peak performance.[1] The CDC 6600, released in 1964, is generally considered the first supercomputer.[2][3] However, some earlier computers were considered supercomputers for their day, such as the 1960 UNIVAC LARC[4], the 1954 IBM NORC[5], and the IBM 7030 Stretch and the Atlas, both in 1962.
While the supercomputers of the 1980s used only a few processors, in the 1990s, machines with thousands of processors began to appear both in the United States and in Japan, setting new computational performance records.
By the end of the 20th century, massively parallel supercomputers with thousands of "off-the-shelf" processors similar to those found in personal computers were constructed and broke through the teraflop computational barrier.
Progress in the first decade of the 21st century was dramatic and supercomputers with over 60,000 processors appeared, reaching petaflop performance levels.
Beginnings: 1950s and 1960s
The term "Super Computing" was first used in the New York World in 1929 to refer to large custom-built tabulators that IBM had made for Columbia University.
In 1957 a group of engineers left Sperry Corporation to form Control Data Corporation (CDC) in Minneapolis, MN. Seymour Cray left Sperry a year later to join his colleagues at CDC.[1] In 1960 Cray completed the CDC 1604, one of the first solid state computers, and the fastest computer in the world[dubious ] at a time when vacuum tubes were found in most large computers.[6]
Around 1960 Cray decided to design a computer that would be the fastest in the world by a large margin. After four years of experimentation along with Jim Thornton, and Dean Roush and about 30 other engineers Cray completed the CDC 6600 in 1964. Cray switched from germanium to silicon transistors, built by Fairchild Semiconductor, that used the planar process. These did not have the drawbacks of the mesa silicon transistors. He ran them very fast, and the speed of light restriction forced a very compact design with severe overheating problems, which were solved by introducing refrigeration, designed by Dean Roush.[7] Given that the 6600 outran all computers of the time by about 10 times, it was dubbed a supercomputer and defined the supercomputing market when one hundred computers were sold at $8 million each.[6][8]
The 6600 gained speed by "farming out" work to peripheral computing elements, freeing the CPU (Central Processing Unit) to process actual data. The Minnesota FORTRAN compiler for the machine was developed by Liddiard and Mundstock at the University of Minnesota and with it the 6600 could sustain 500 kiloflops on standard mathematical operations.[9] In 1968 Cray completed the CDC 7600, again the fastest computer in the world.[6] At 36 MHz, the 7600 had about three and a half times the clock speed of the 6600, but ran significantly faster due to other technical innovations. They sold only about 50 of the 7600s, not quite a failure. Cray left CDC in 1972 to form his own company.[6] Two years after his departure CDC delivered the STAR-100 which at 100 megaflops was three times the speed of the 7600. Along with the Texas Instruments ASC, the STAR-100 was one of the first machines to use vector processing - the idea having been inspired around 1964 by the APL programming language.[10][11]
In 1956, a team at Manchester University in the United Kingdom, began development of MUSE — a name derived from microsecond engine — with the aim of eventually building a computer that could operate at processing speeds approaching one microsecond per instruction, about one million instructions per second.[12] Mu (or µ) is a prefix in the SI and other systems of units denoting a factor of 10−6 (one millionth).
At the end of 1958 Ferranti agreed to begin to collaborate with Manchester University on the project, and the computer was shortly afterwards renamed Atlas, with the joint venture under the control of Tom Kilburn. The first Atlas was officially commissioned on 7 December 1962, nearly three years before the Cray CDC 6600 supercomputer was introduced, as one of the world's first supercomputers - and was considered to be the most powerful computer in England and for a very short time was considered to be one of the most powerful computers in the world, and equivalent to four IBM 7094s.[13] It was said that whenever England's Atlas went offline half of the United Kingdom's computer capacity was lost.[13] The Atlas pioneered the use of virtual memory and paging as a way to extend the Atlas's working memory by combining its 16,384 words of primary core memory with an additional 96K words of secondary drum memory.[14] Atlas also pioneered the Atlas Supervisor, "considered by many to be the first recognizable modern operating system".[13]
The Cray era: mid-1970s and 1980s
Four years after leaving CDC, Cray delivered the 80 MHz Cray 1 in 1976, and it became the most successful supercomputer in history.[11][15] The Cray 1 used integrated circuits with two gates per chip and was a vector processor which introduced a number of innovations such as chaining in which scalar and vector registers generate interim results which can be used immediately, without additional memory references which reduce computational speed.[7][16] The Cray X-MP (designed by Steve Chen) was released in 1982 as a 105 MHz shared-memory parallel vector processor with better chaining support and multiple memory pipelines. All three floating point pipelines on the X-MP could operate simultaneously.[16]
The Cray-2 released in 1985 was a 4 processor liquid cooled computer totally immersed in a tank of Fluorinert, which bubbled as it operated.[7] It could perform to 1.9 gigaflops and was the world's second fastest supercomputer after M-13 (2.4 gigaflops)[17] until 1990 when ETA-10G from CDC overtook both. The Cray 2 was a totally new design and did not use chaining and had a high memory latency, but used much pipelining and was ideal for problems that required large amounts of memory.[16] The software costs in developing a supercomputer should not be underestimated, as evidenced by the fact that in the 1980s the cost for software development at Cray came to equal what was spent on hardware.[18] That trend was partly responsible for a move away from the in-house, Cray Operating System to UNICOS based on Unix.[18]
The Cray Y-MP, also designed by Steve Chen, was released in 1988 as an improvement of the X-MP and could have eight vector processors at 167 MHz with a peak performance of 333 megaflops per processor.[16] In the late 1980s, Cray's experiment on the use of gallium arsenide semiconductors in the Cray-3 did not succeed. Cray began to work on a massively parallel computer in the early 1990s, but died in a car accident in 1996 before it could be completed. Cray Research did, however, produce such computers.[15][7]
Massive processing: the 1990s
The Cray-2 which set the frontiers of supercomputing in the mid to late 1980s had only 8 processors. In the 1990s, supercomputers with thousands of processors began to appear. Another development at the end of the 1980s was the arrival of Japanese supercomputers, some of which were modeled after the Cray-1.
The SX-3/44R was announced by NEC Corporation in 1989 and a year later earned the fastest in the world title with a 4 processor model.[19] However, Fujitsu's Numerical Wind Tunnel supercomputer used 166 vector processors to gain the top spot in 1994. It had a peak speed of 1.7 gigaflops per processor.[20][21] The Hitachi SR2201 on the other hand obtained a peak performance of 600 gigaflops in 1996 by using 2048 processors connected via a fast three-dimensional crossbar network.[22][23][24]
In the same timeframe the Intel Paragon could have 1000 to 4000 Intel i860 processors in various configurations, and was ranked the fastest in the world in 1993. The Paragon was a MIMD machine which connected processors via a high speed two-dimensional mesh, allowing processes to execute on separate nodes; communicating via the Message Passing Interface.[25] By 1995 Cray was also shipping massively parallel systems, e.g. the Cray T3E with over 2,000 processors, using a three-dimensional torus interconnect.[26][27]
The Paragon architecture soon led to the Intel ASCI Red supercomputer in the United States, which held the top supercomputing spot to the end of the 20th century as part of the Advanced Simulation and Computing Initiative. This was also a mesh-based MIMD massively-parallel system with over 9,000 compute nodes and well over 12 terabytes of disk storage, but used off-the-shelf Pentium Pro processors that could be found in everyday personal computers. ASCI Red was the first system ever to break through the 1 teraflop barrier on the MP-Linpack benchmark in 1996; eventually reaching 2 teraflops.[28]
Petascale computing in the 21st century
Significant progress was made in the first decade of the 21st century. The efficiency of supercomputers continued to increase, but not dramatically so. The Cray C90 used 500 kilowatts of power in 1991, while by 2003 the ASCI Q used 3,000 kW while being 2,000 times faster, increasing the performance per watt 300 fold.[29]
In 2004, the Earth Simulator supercomputer built by NEC at the Japan Agency for Marine-Earth Science and Technology (JAMSTEC) reached 35.9 teraflops, using 640 nodes, each with eight proprietary vector processors.[30]
The IBM Blue Gene supercomputer architecture found widespread use in the early part of the 21st century, and 27 of the computers on the TOP500 list used that architecture. The Blue Gene approach is somewhat different in that it trades processor speed for low power consumption so that a larger number of processors can be used at air cooled temperatures. It can use over 60,000 processors, with 2048 processors "per rack", and connects them via a three-dimensional torus interconnect.[31][32]
Progress in China has been rapid, in that China placed 51st on the TOP500 list in June 2003, then 14th in November 2003, and 10th in June 2004 and then 5th during 2005, before gaining the top spot in 2010 with the 2.5 petaflop Tianhe-I supercomputer.[33][34]
In July 2011, the 8.1 petaflop Japanese K computer became the fastest in the world using over 60,000 SPARC64 VIIIfx processors housed in over 600 cabinets. The fact that K computer is over 60 times faster than the Earth Simulator, and that the Earth Simulator ranks as the 68th system in the world seven years after holding the top spot demonstrates both the rapid increase in top performance and the widespread growth of supercomputing technology worldwide.[35][36][37]
Historical TOP500 table
This is a list of the computers which appeared at the top of the Top500 list since 1993.[38] The "Peak speed" is given as the "Rmax" rating.
Combined performance of 500 largest supercomputers
Fastest supercomputer
Supercomputer on 500th place
Export controls
The CoCom and its later replacement, the Wassenaar Arrangement, legally regulated - required licensing and approval and record-keeping; or banned entirely - the export of high-performance computers (HPCs) to certain countries. Such controls have become harder to justify, leading to loosening of these regulations. Some have argued these regulations were never justified.[39][40][41][42][43][44]
See also
- Linpack
- TOP500
- Green 500
- FLOPS
- Instructions per second
- Quasi-opportunistic supercomputing
- Supercomputer architecture
- Supercomputing in China
- Supercomputing in Europe
- Supercomputing in India
- Supercomputing in Japan
- Supercomputing in Pakistan
References
- ^ a b Chen, Sao-Jie; Lin, Guang-Huei; Hsiung, Pao-Ann; Hu, Yu-Hen (2009). Hardware software co-design of a multimedia SOC platform. Springer Science+Business Media. pp. 70–72. ISBN 9781402096235. Retrieved 20 February 2018.
- ^ Impagliazzo, John; Lee, John A. N. (2004). History of computing in education. p. 172. ISBN 1-4020-8135-9. Retrieved 20 February 2018.
- ^ Sisson, Richard; Zacher, Christian K. (2006). The American Midwest: an interpretive encyclopedia. p. 1489. ISBN 0-253-34886-2.
- ^ Lundstrom, David E. (1984). A Few Good Men from UNIVAC. MIT Press. Retrieved 20 February 2018.
- ^ Frank da Cruz (25 October 2013) [2004]. "IBM NORC". Retrieved 20 February 2018.
- ^ a b c d Hannan, Caryn (2008). Wisconsin Biographical Dictionary. pp. 83–84. ISBN 1-878592-63-7. Retrieved 20 February 2018.
- ^ a b c d Murray, Charles J. (1997). The Supermen. Wiley & Sons.
- ^ Ceruzzi, Paul E. (2003). A history of modern computing. p. 161. ISBN 978-0-262-53203-7. Retrieved 20 February 2018.
- ^ Frisch, Michael J. (December 1972). "Remarks on algorithm 352 [S22], algorithm 385 [S13], algorithm 392 [D3]". Communications of the ACM. 15 (12): 1074. doi:10.1145/361598.361914.
- ^ Fosdick, Lloyd Dudley (1996). An Introduction to high-performance scientific computing. MIT Press. p. 418. ISBN 0-262-06181-3.
- ^ a b Hill, Mark Donald; Jouppi, Norman Paul; Sohi, Gurindar (1999). Readings in computer architecture. p. 41-48. ISBN 978-1-55860-539-8.
- ^ "The Atlas". University of Manchester. Archived from the original on 28 July 2012. Retrieved 21 September 2010.
{{cite web}}: Unknown parameter|deadurl=ignored (|url-status=suggested) (help) - ^ a b c Lavington, Simon Hugh (1998). A History of Manchester Computers (2 ed.). Swindon: The British Computer Society. pp. 41–52. ISBN 978-1-902505-01-5.
- ^ Creasy, R. J. (September 1981), "The Origin of the VM/370 Time-Sharing System" (PDF), IBM Journal of Research & Development, vol. 25, no. 5, p. 486
- ^ a b Reilly, Edwin D. (2003). Milestones in computer science and information technology. p. 65. ISBN 1-57356-521-0.
- ^ a b c d Tokhi, M. O.; Hossain, Mohammad Alamgir (2003). Parallel computing for real-time signal processing and control. pp. 201–202. ISBN 978-1-85233-599-1.
- ^ "Mikhail A.Kartsev - Developer of Super-Computers for Space Observation". ICFCST. 2018 [1998]. Retrieved 20 February 2018.
- ^ a b MacKenzie, Donald (1998). Knowing machines: essays on technical change. p. 149-151. ISBN 0-262-63188-1.
- ^ Glowinski, R.; Lichnewsky, A. Computing methods in applied sciences and engineering. pp. 353–360. ISBN 0-89871-264-5.
- ^ "TOP500 Annual Report 1994". 1 October 1996.
- ^ Hirose, N.; Fukuda, M. (1997). Numerical Wind Tunnel (NWT) and CFD Research at National Aerospace Laboratory. Proceedings of HPC-Asia '97. IEEE Computer Society. doi:10.1109/HPC.1997.592130.
- ^ Fujii, H.; Yasuda, Y.; Akashi, H.; Inagami, Y.; Koga, M.; Ishihara, O.; Kashiyama, M.; Wada, H.; Sumimoto, T. (April 1997). Architecture and performance of the Hitachi SR2201 massively parallel processor system. Proceedings of 11th International Parallel Processing Symposium. pp. 233–241. doi:10.1109/IPPS.1997.580901.
- ^ Iwasaki, Y. (January 1998). The CP-PACS project. Nuclear Physics B - Proceedings Supplements. Vol. 60, no. 1–2. pp. 246–254. doi:10.1016/S0920-5632(97)00487-8.
- ^ A.J. van der Steen, Overview of recent supercomputers, Publication of the NCF, Stichting Nationale Computer Faciliteiten, the Netherlands, January 1997.
- ^ Reed, Daniel A. (2003). Scalable input/output: achieving system balance. p. 182. ISBN 978-0-262-68142-1.
- ^ "Cray Sells First T3E-1350 Supercomputer to PhillipsPetroleum" (Press release). Seattle: Gale Group. Business Wire. 7 August 2000.
- ^ Agida, N. R.; et al. (et al.) (March–May 2005). "Blue Gene/L Torus Interconnection Network" (PDF). IBM Journal of Research and Development. 45 (2–3): 265. Archived from the original (PDF) on 2011-08-15. Retrieved 2012-02-09.
{{cite journal}}: Unknown parameter|deadurl=ignored (|url-status=suggested) (help) - ^ Greenberg, David S. (1998). Heath, Michael T. (ed.). "Enabling Department-Scale Supercomputing". Algorithms for parallel processing. 105: 323. ISBN 0-387-98680-4. Retrieved 20 February 2018.
- ^ Feng, Wu-chun (1 October 2003). "Making a Case for Efficient Supercomputing" (PDF). ACM Queue Magazine. 1 (7). doi:10.1145/957717.957772. Archived from the original (PDF) on 30 March 2012. Retrieved 6 February 2016.
{{cite journal}}: Unknown parameter|deadurl=ignored (|url-status=suggested) (help)CS1 maint: date and year (link) - ^ Sato, Tetsuya (2004). "The Earth Simulator: Roles and Impacts". Nuclear Physics B: Proceedings Supplements. 129: 102. doi:10.1016/S0920-5632(03)02511-8.
- ^ Almasi, George; et al. (et al.) (2005). Cunha, José Cardoso; Medeiros, Pedro D. (eds.). Early Experience with Scientific Applications on the Blue Gene/L Supercomputer. Euro-Par 2005 parallel processing: 11th International Euro-Par Conference. pp. 560–567. ISBN 978-3-540-28700-1.
- ^ Morgan, Timothy Prickett (22 November 2010). "IBM uncloaks 20 petaflops BlueGene/Q super". The Register.
- ^ Graham, Susan L.; Snir, Marc; Patterson, Cynthia A. (2005). Getting up to speed: the future of supercomputing. p. 188. ISBN 0-309-09502-6.
- ^ Vance, Ashlee (28 October 2010). "China Wrests Supercomputer Title From U.S." New York Times. Retrieved 20 February 2018.
- ^ "Japanese supercomputer 'K' is world's fastest". The Telegraph. 20 June 2011. Retrieved 20 June 2011.
- ^ "Japanese 'K' Computer Is Ranked Most Powerful". The New York Times. 20 June 2011. Retrieved 20 June 2011.
- ^ "Supercomputer "K computer" Takes First Place in World". Fujitsu. Retrieved 20 June 2011.
- ^ "Sublist Generator". Top500. 2017. Retrieved 20 February 2018.
- ^ "Complexities of Setting Export Control Thresholds: Computers". Export controls and nonproliferation policy (PDF). DIANE Publishing. May 1994. ISBN 9781428920521.
- ^ Wolcott, Peter; Goodman, Seymour; Homer, Patrick (November 1998). "High Performance Computing Export Controls: Navigating Choppy Waters". Communications of the ACM. 41 (11). New York, USA: 27–30. doi:10.1145/287831.287836.
- ^ McLoughlin, Glenn J.; Fergusson, Ian F. (10 February 2003). High Performance Computers and Export Control Policy (PDF) (Report).
- ^ Brugger, Seth (1 September 2000). "U.S. Revises Computer Export Control Regulations". Arms Control Association.
- ^ "Export Controls for High Performance Computers". 24 June 2011.
- ^ Blagdon, Jeff (30 May 2013). "US removes sanctions on computer exports to Iran".