The PowerPC 970, PowerPC 970FX, PowerPC 970GX, and PowerPC 970MP, are 64-bit Power Architecture processors from IBM introduced in 2002. When used in Apple Inc. machines, they were dubbed the PowerPC G5.
The 970 family was created through a collaboration between IBM and Apple. The project went under the codename GP-UL or Giga Processor Ultra Light, where Giga Processor was the codename for the POWER4 from which the core was derived. When Apple introduced the Power Mac G5, they stated that this was a five year collaborative effort, with multiple future generations, but it was short-lived. Apple had to retract the promise to deliver a 3 GHz processor one year after its introduction, and IBM could never get the power consumption down far enough for these processors to fit into a portable computer. Apple only used three variants of the processor.
IBM’s JS20/JS21 blade modules and some low-end workstations and System p servers are based on PowerPC 970. It is also used in some high end embedded systems like Mercury’s Momentum XSA-200. IBM is also licensing the PowerPC 970 core for use in custom applications. A common misconception is that the PowerPC 970 was the core in IBM's Xenon processor in Microsoft's Xbox 360, but this is false. That processor is using cores similar to the Power Processing Element (PPE) in the Cell microprocessor.
Like the POWER4, the front-end is nine stages long. The PowerPC 970 can fetch and decode up to eight instructions, dispatch up to five to reserve stations, issue up to eight to the execution units and retire up to five per cycle. The execution pipelines were lengthened compared to the POWER4 to achieve higher clock frequencies. It has eight execution units: two arithmetic logic units (ALUs), two double precision floating-point units, two load/store units and two AltiVec units.
One of the AltiVec units executes integer and floating-point instructions, and the other only permute instructions. The latter has three subunits for simple integer, complex integer and floating-point instructions. These units have pipelines of varying lengths: 10 stages for simple integer and permute instructions, 13 stages for complex integer instructions and 16 stage for floating-point instructions.
The processor has two unidirectional 32-bit double data rate (DDR) buses (one for reads, the other for writes) to the system controller chip (northbridge) running at one quarter of the processor core speed. The buses also carry addresses and control signals in addition to data so only a percentage of the peak bandwidth can be realized (6.4 GB/s at 450 MHz). As the buses are unidirectional, each direction can realize only half the aggregate bandwidth, or 3.2 GB/s.
The PowerPC 970 was announced by IBM in October 2002. It was released in Apple Computer's Power Mac G5 in June 2003 (in keeping with its previous naming conventions, Apple termed the PowerPC 970 based products G5, for the fifth generation of PowerPC microprocessors). IBM released its first PowerPC 970 blade servers, the BladeCenter JS20, in November 2003.
The PowerPC 970 had 512 KB of full-speed L2 cache and clock speeds from 1.6 to 2.0 GHz. The front side bus ran at half the processor's clock speed.
The PowerPC 970FX used a 90 nm manufacturing process and has a maximum power rating of 11 watts at 149 degrees Fahrenheit (65 °C) while clocked at 1 GHz and a maximum of 48 watts at 2 GHz.
Apple released their 970FX-powered machines throughout 2004: the Xserve G5 in January, the Power Mac G5 in June, and the iMac G5 in August. The Power Mac introduced a top clock speed of 2.5 GHz while liquid-cooled (eventually reaching as high as 2.7 GHz in April 2005). The iMac ran the front side bus at a third of the clock speed.
Despite intense user demand for a faster laptop CPU than the G4, Apple never used a G5 series CPU in their PowerBook laptops. The original 970 used far too much power and was never seriously viewed as a candidate for a portable computer. The 970FX reduced thermal design power (TDP) to about 30 W at 1.5 GHz, a figure which led many users to believe a PowerBook G5 might be possible. However, several obstacles prevented even the 970FX from being used in this application. At 1.5 GHz, the G5 was not substantially faster than the 1.5 and 1.67 GHz G4 processors which Apple used in PowerBooks instead. Furthermore, the northbridge chips available to interface the 970FX to memory and other devices were not designed for portable computers, and consumed too much power. Finally, the 970FX had inadequate power saving features for a portable CPU. Its minimum (idle) power was much too high, which would have led to poor battery life figures in a notebook computer.
IBM announced the PowerPC 970MP, code-named "Antares", on 7 July 2005 at the Power Everywhere forum in Tokyo. The 970MP is a dual-core derivative of the 970FX with clock speeds between 1.2 and 2.5 GHz, and a maximum power usage of 75 W at 1.8 GHz and 100 W at 2.0 GHz. Each core has 1 MB of L2 cache, twice that of the 970FX. Like the 970FX, this chip was produced at the 90 nm process. When one of the cores is idle, it will enter a "doze" state and shut down. The 970MP also includes partitioning and virtualization features.
The PowerPC 970MP replaced the PowerPC 970FX in Apple's high-end Power Mac G5 computers, while the iMac G5 and the legacy PCI-X Power Mac G5 continued to use the PowerPC 970FX processor. The PowerPC 970MP is used in IBM's JS21 blade modules, IBM Intellistation POWER 185 workstation and YDL Powerstation.
Due to high power requirements, IBM has chosen to discontinue parts running faster than 2.0 GHz.
The PowerPC 970GX is a cancelled single-core version of PowerPC 970MP. It featured a 1 MB L2 cache and would have been available in frequencies of 1.2 to 3 GHz. Power dissipation would have been 16 W at 1.6 GHz, and 85 W at 3 GHz. It was to be fabricated in the same 90 nm fabrication process as the 970MP.
Illustrations of the different generations of 970 processors. All are manufactured in IBM's East Fishkill plant in New York on a white ceramic substrate which was typical for IBM's high end processors of the era.
The first PowerPC 970, manufactured on a 130 nm process in week 20 of 2003.
The PowerPC 970FX was manufactured on a 90 nm process in week 25 of 2004, and the smaller die can be clearly seen.
The PowerPC 970MP had two cores on the same die and twice the L2 cache per core than the 970FX so its size is much larger. It's manufactured in week 24 of 2005.
There are two dedicated northbridges for PowerPC 970-based computers, both manufactured by IBM:
- CPC925 — Designed by Apple and called the U3 or the U3H (which supports ECC memory). It is capable of supporting up to two PowerPC 970s or PowerPC 970FXs and has two 550 MHz unidirectional processor buses, a 400 MHz DDR memory controller, x8 AGP and a 400 MHz 16-bit HyperTransport tunnel. It fabricated on a 130 nm process. Additionally, there was an unreleased U3Lite northbridge in development for the powerbook G5, which never made it to market.
- CPC945 — Designed by IBM and called U4 by Apple, it is capable of supporting two PowerPC 970MPs and has two 625 MHz unidirectional processor buses, two memory controllers that support up to 64 GB of 533 MHz DDR2 SDRAM with ECC capability and has a x16 PCIe lane and an 800 MHz 16-bit HyperTransport tunnel. It is fabricated on a 90 nm process.
There was also a cancelled CPC965 northbridge. Slated for release in 2007, it was to be a uniprocessor-only northbridge. Its features were a 533 MHz DDR2 controller that supported up to 8 GB ECC memory, a 8x PCIe bus, integrated four-port Gigabit Ethernet with IPv4 TCP/UDP offloading, USB 2.0 ports, a Flash-interface. The northbridge contains an integrated PowerPC 405 core to provide system management and configuration capabilities.
IBM uses its proprietary Elastic interface bus in the modules.
- POWER3, POWER4 and POWER5
- PowerPC G4 and Altivec
- Power Mac G5 and Xserve G5
- Supercomputers using the PowerPC 970:
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- Paul Hales: Friday, 8 July 2005, 5:28 PM (8 July 2005). "IBM introduces dual-core PowerPC 970 chip - The INQUIRER". Theinquirer.net. Retrieved 2008-09-22.
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- IBM production dates CPU-World
- Steve Jobs, Apple (25 June 2003). "WWDC 2003 Keynote". YouTube. Retrieved 2009-10-16.
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