IBM Xenon microprocessor.
|Instruction set||Power Architecture|
|Cores||3 (physical), 6 (logical)|
|L1 cache||32/32 kB|
|L2 cache||1024 kB|
Xenon is a CPU used in the Xbox 360 game console. The processor, internally codenamed "Waternoose", which was named after Henry J. Waternoose III in Monsters, Inc. by IBM and XCPU by Microsoft, is based on IBM PowerPC instruction set architecture, consisting of three independent processor cores on a single die. These cores are slightly modified versions of the PPE in the Cell processor used on the PlayStation 3. Each core has two symmetric hardware threads (SMT), for a total of six hardware threads available to games. Each individual core also includes 32 KiB of L1 instruction cache and 32 KiB of L1 data cache.
The processors are labelled "XCPU" on the packaging and are manufactured by Chartered (now part of GlobalFoundries). Chartered reduced the fabrication process in 2007 to 65 nm from 90 nm, thus reducing manufacturing costs for Microsoft.
The name "Xenon" was repurposed from the code name for the Xbox 360 in early development. Prototypes had the name "Shiva" an was used for early test and verification. Those was mounted on a ceramic substrate and manufactured by IBM, as opposed to the production processors that was manufactured by Chartered.
- 90 nm process, 65 nm process upgrade in 2007 (codenamed "Falcon", later "Jasper"), 45 nm process since Xbox 360 S model
- 165 million transistors
- Three symmetrical cores, each two way SMT-capable and clocked at 3.2 GHz
- SIMD: VMX128 with 2× (128×128 bit) register files for each core
- 1 MB L2 cache (lockable by the GPU) running at half-speed (1.6 GHz) with a 256-bit bus
- 51.2 GB/s of L2 memory bandwidth (256 bit × 1600 MHz)
- 21.6 GB/s front-side bus (On the CPU side, this interfaces to a 1.35 GHz, 8B wide, FSB dataflow; on the GPU side, it connects to a 16B wide FSB dataflow running at 675Mhz.)
- Dot product performance: 9.6 billion per second
- Restricted to in-order code execution
- eFuse 768 bits
- ROM (and 64 KB SRAM) storing Microsoft's Secure Bootloader, and encryption hypervisor
- Big endian architecture
The Xbox 360 S introduced the XCGPU, which integrated the Xenon CPU and the Xenos GPU onto the same die, and the eDRAM into the same package. The XCGPU follows the trend started with the integrated EE+GS in PlayStation 2 Slimline, combining CPU, GPU, memory controllers and IO in a single cost-reduced chip. It also contains a "front side bus replacement block" that connects the CPU and GPU internally in exactly the same manner as the front side bus would have done when the CPU and GPU were separate chips, so that the XCGPU doesn't change the hardware characteristics of the Xbox 360.
XCGPU contains 372 million transistors and is manufactured by GlobalFoundries on a 45 nm process. Compared to the original chipset in the Xbox 360 the combined power requirements are reduced by 60% and the physical chip area by 50%.
Illustrations of the different generations of processors in Xbox 360 and Xbox 360 S.
- "Learning from failure - The inside story on how IBM out-foxed Intel with the Xbox 360", Dean Takahashi, Electronic Business, May 1, 2006
- "Processing The Truth: An Interview With David Shippy", Leigh Alexander, Gamasutra, January 16, 2009
- "Playing the Fool", Jonathan V. Last, Wall Street Journal, December 30, 2008
- CPU-World.com forums.
- Jeffrey Brown (2005-12-06). "Application-customized CPU design: The Microsoft Xbox 360 CPU story". Retrieved 2007-09-08.
- César A. Berardini (2006-08-21). "Chartered to Manufacture 65-nm Xbox 360 CPUs". Retrieved 2008-01-09.
- Patel, Nilay (14 June 2010). "New Xbox 360 looks angular and Ominous". Engadget.com. Retrieved 2010-06-14.
- "Xbox360 security system".
- Jon Stokes, Ars Technica (2010-08-24). "Microsoft beats Intel, AMD to market with CPU/GPU combo chip". Retrieved 2010-08-24.
- PC Perspective (2010-06-21). "The New Xbox 360 S "Slim" Teardown: Opened and Tested". Retrieved 2010-06-24.
- Xenon hardware overview by Pete Isensee, Development Lead, Xbox Advanced Technology Group, written some time before 23 June 2007