ARM9: Difference between revisions
No edit summary |
|||
Line 27: | Line 27: | ||
==Applications== |
==Applications== |
||
* [[Excito]] Bubba B1 Server |
|||
* [[Buffalo network-attached storage series]] Linkstation Pro and KuroBox Pro |
* [[Buffalo network-attached storage series]] Linkstation Pro and KuroBox Pro |
||
* [[Canon EOS 5D Mark II]] [[digital SLR]] camera<ref>[http://magiclantern.wikia.com/wiki/Datasheets]</ref> |
* [[Canon EOS 5D Mark II]] [[digital SLR]] camera<ref>[http://magiclantern.wikia.com/wiki/Datasheets]</ref> |
Revision as of 19:51, 7 September 2011
ARM9 is an ARM architecture 32-bit RISC CPU family. With this design generation, ARM moved from a von Neumann architecture (Princeton architecture) to a Harvard architecture with separate instruction and data buses (and caches), significantly increasing its potential speed. Most silicon chips integrating these cores will package them as modified Harvard architecture chips, combining the two address buses on the other side of separated CPU caches and tightly coupled memories.
There are two subfamilies, implementing different ARM architecture versions.
ARM9TDMI-based cores
ARM9TDMI is a successor to the popular ARM7TDMI core, and is also based on the ARMv4T architecture. Cores based on it support both 32-bit ARM and 16-bit Thumb instruction sets include:
- ARM920T with 16 KB each of I/D cache and an MMU
- ARM922T with 8 KB each of I/D cache and an MMU
- ARM940T with cache and a Memory Protection Unit (MPU)
Differences from ARM7 cores
Key improvements over ARM7 cores, enabled by spending more transistors, include[1]:
- Decreased heat production and lower overheating risk.
- Clock frequency improvements. Shifting from a three stage pipeline to a five stage one lets the clock speed be approximately doubled, on the same silicon fabrication process.
- Cycle count improvements. Many unmodified ARM7 binaries were measured as taking about 30% fewer cycles to execute on ARM9 cores. Key improvements include
- Faster loads and stores; many instructions now cost just one cycle. This is helped by both the modified Harvard architecture (reducing bus and cache contention) and the new pipeline stages.
- Exposing pipeline interlocks, enabling compiler optimizations to reduce blockage between stages.
Additionally, some ARM9 cores incorporate "Enhanced DSP" instructions, such as a multiply-accumulate, to support more efficient implementations of digital signal processing algorithms.
Switching to a Harvard architecture entailed a non-unified cache, so that instruction fetches do not evict data (and vice versa). ARM9 cores have separate data and address bus signals, which chip designers use in various ways. In most cases they connect at least part of the address space in von Neumann style, used for both instructions and data, usually to an AHB interconnect connecting to a DRAM interface and an External Bus Interface usable with NOR flash memory. Such hybrids are no longer pure Harvard architecture processors.
ARM9E-based cores
ARM9E, and its ARM9EJ sibling, implement longer pipelines and the ARMv5TE architecture, which includes some DSP-ish instruction set extensions. They support 32-bit, 16-bit, and sometimes 8-bit instruction sets.
- ARM926EJ-S (includes ARM Jazelle technology which enables the direct execution of 8-bit Java bytecode in hardware), and an MMU
- ARM946
- ARM966
- ARM968
Applications
- Excito Bubba B1 Server
- Buffalo network-attached storage series Linkstation Pro and KuroBox Pro
- Canon EOS 5D Mark II digital SLR camera[2]
- Chumby
- Conexant 802.11 products
- Data Robotics DroboFS, NAS
- Fiat Blue&Me
- Freecom Musicpal internet radio (ARM926EJ)
- GP2X Wiz
- Hanlin eReader
- Sun Service Processor running the ILOM Java stack
- Hewlett Packard Hp 50g @ 90 MHz
- Lacie EtherDisk
- Livescribe Pulse and Echo Smartpens
- Logitech Squeezebox (network music player) Radio (ARM926EJ)
- Nintendo DS
- Nintendo DSi
- Nintendo Wii's ATI Hollywood graphic chip (security coprocessor)
- OYO eBook-reader from Condor Technology/Medion
- PlayStation Portable's WLAN chip. [2]
- SATEL SATELLAR Digital System radio modem [3]
- Seagate FreeAgent DockStar STDSD10G-RK (ARM926EJ-S rev 1 (v5l))
- Synology's Disk Station (models DS-x07+), Cube Station CS-407, and Rack Station RS-407 [4]
- Texas Instruments TI-Nspire graphing calculator @ 90/150 MHz
- VTech V.Flash educational consoles[3]
- Western Digital My Book series NAS devices
- many mobile phones from
- HTC (e.g. HTC Wizard)
- LG (LG Cookie (KP500) at 175 MHz)
- Nokia (like Nokia 5220 XpressMusic, Nokia N-Gage and almost all N-Series Smartphones at 100-330 MHz)
- Philips
- Siemens/BenQ (x65 series and newer)
- Sony Ericsson (K, M and W series, usually at 206 MHz)
See also
References
- ^ "Performance of the ARM9TDMI and ARM9E-S cores compared to the ARM7TDMI core", Issue 1.0, dated 9 February 2000, ARM Ltd.
- ^ [1]
- ^ VTech V.Flash product page from ARM